文件名称:RC6-block-cipher-using-VHDL
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VHDL implementation of RC6 encryption algorithm
Test file represent applying all zero input and all zero key
note that result is correct but bytes positions are swapped
Test file represent applying all zero input and all zero key
note that result is correct but bytes positions are swapped
(系统自动生成,下载前可以参看下载内容)
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RC6 block cipher using VHDL.doc