文件名称:AD_TEST
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失败请重下，重下不扣分。
介绍说明－－下载内容均来自于网络，请自行研究使用
1、 本工程主要是把输人AD芯片的电压显示在数码管上。
2、 测试时，从JTAG口把AD_TEST.sof下载到FPGA，右边的4个数码管将会显示电压数据（单位：毫伏）。
-1, this project is mainly to AD input voltage displayed on the digital chip tube. 2 test, from the JTAG port to AD_TEST.sof download to the FPGA, the right of the four digital displays voltage data (unit: mV). 3, power can be measured with a multimeter and AD chip 2 feet between the voltage and the digital display on the same tube. LED below the U14 is the AD chip, which is next to the RP6 adjustable resistors, variable resistors can be changed by adjusting the input voltage chip AD.
2、 测试时，从JTAG口把AD_TEST.sof下载到FPGA，右边的4个数码管将会显示电压数据（单位：毫伏）。
-1, this project is mainly to AD input voltage displayed on the digital chip tube. 2 test, from the JTAG port to AD_TEST.sof download to the FPGA, the right of the four digital displays voltage data (unit: mV). 3, power can be measured with a multimeter and AD chip 2 feet between the voltage and the digital display on the same tube. LED below the U14 is the AD chip, which is next to the RP6 adjustable resistors, variable resistors can be changed by adjusting the input voltage chip AD.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
AD_TEST
.......\ADC_ADS7822.bsf
.......\ADC_ADS7822.v
.......\ADC_ADS7822.v.bak
.......\AD_TEST.asm.rpt
.......\AD_TEST.bdf
.......\AD_TEST.done
.......\AD_TEST.dpf
.......\AD_TEST.fit.rpt
.......\AD_TEST.fit.smsg
.......\AD_TEST.fit.summary
.......\AD_TEST.flow.rpt
.......\AD_TEST.map.rpt
.......\AD_TEST.map.smsg
.......\AD_TEST.map.summary
.......\AD_TEST.pin
.......\AD_TEST.pof
.......\AD_TEST.qpf
.......\AD_TEST.qsf
.......\AD_TEST.qws
.......\AD_TEST.sof
.......\AD_TEST.tan.rpt
.......\AD_TEST.tan.summary
.......\bin27seg.bsf
.......\bin27seg.v
.......\bin27seg.v.bak
.......\db
.......\..\AD_TEST.db_info
.......\..\AD_TEST.eco.cdb
.......\..\AD_TEST.sld_design_entry.sci
.......\mod.v.bak
.......\mode.v
.......\mode.v.bak
.......\Setup.tcl
.......\Setup.tcl.bak
.......\ADC_ADS7822.bsf
.......\ADC_ADS7822.v
.......\ADC_ADS7822.v.bak
.......\AD_TEST.asm.rpt
.......\AD_TEST.bdf
.......\AD_TEST.done
.......\AD_TEST.dpf
.......\AD_TEST.fit.rpt
.......\AD_TEST.fit.smsg
.......\AD_TEST.fit.summary
.......\AD_TEST.flow.rpt
.......\AD_TEST.map.rpt
.......\AD_TEST.map.smsg
.......\AD_TEST.map.summary
.......\AD_TEST.pin
.......\AD_TEST.pof
.......\AD_TEST.qpf
.......\AD_TEST.qsf
.......\AD_TEST.qws
.......\AD_TEST.sof
.......\AD_TEST.tan.rpt
.......\AD_TEST.tan.summary
.......\bin27seg.bsf
.......\bin27seg.v
.......\bin27seg.v.bak
.......\db
.......\..\AD_TEST.db_info
.......\..\AD_TEST.eco.cdb
.......\..\AD_TEST.sld_design_entry.sci
.......\mod.v.bak
.......\mode.v
.......\mode.v.bak
.......\Setup.tcl
.......\Setup.tcl.bak