文件名称:qiangdaqi
介绍说明－－下载内容均来自于网络，请自行研究使用
抢答器，通过FPGA实现了各种功能，课程设计所做，因为代码简单，没有分模块，一个程序写完了。-Responder, through the FPGA to achieve a variety of functions, curriculum design done, because the code is simple, there is no sub-module, a program finished.
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下载文件列表
qiangdaqi\db\add_sub_0ih.tdf
.........\..\add_sub_1nh.tdf
.........\..\prev_cmp_Vhdl1.asm.qmsg
.........\..\prev_cmp_Vhdl1.fit.qmsg
.........\..\prev_cmp_Vhdl1.map.qmsg
.........\..\prev_cmp_Vhdl1.qmsg
.........\..\prev_cmp_Vhdl1.sim.qmsg
.........\..\prev_cmp_Vhdl1.tan.qmsg
.........\..\Vhdl1.asm.qmsg
.........\..\Vhdl1.cbx.xml
.........\..\Vhdl1.cmp.cdb
.........\..\Vhdl1.cmp.ecobp
.........\..\Vhdl1.cmp.hdb
.........\..\Vhdl1.cmp.logdb
.........\..\Vhdl1.cmp.rdb
.........\..\Vhdl1.cmp.tdb
.........\..\Vhdl1.cmp0.ddb
.........\..\Vhdl1.cmp_bb.hdb
.........\..\Vhdl1.cmp_bb.logdb
.........\..\Vhdl1.cmp_bb.rcf
.........\..\Vhdl1.dbp
.........\..\Vhdl1.db_info
.........\..\Vhdl1.eco.cdb
.........\..\Vhdl1.eds_overflow
.........\..\Vhdl1.fit.qmsg
.........\..\Vhdl1.hier_info
.........\..\Vhdl1.hif
.........\..\Vhdl1.map.cdb
.........\..\Vhdl1.map.ecobp
.........\..\Vhdl1.map.hdb
.........\..\Vhdl1.map.logdb
.........\..\Vhdl1.map.qmsg
.........\..\Vhdl1.map_bb.logdb
.........\..\Vhdl1.pre_map.cdb
.........\..\Vhdl1.pre_map.hdb
.........\..\Vhdl1.psp
.........\..\Vhdl1.pss
.........\..\Vhdl1.rtlv.hdb
.........\..\Vhdl1.rtlv_sg.cdb
.........\..\Vhdl1.rtlv_sg_swap.cdb
.........\..\Vhdl1.sgdiff.cdb
.........\..\Vhdl1.sgdiff.hdb
.........\..\Vhdl1.sim.cvwf
.........\..\Vhdl1.sim.hdb
.........\..\Vhdl1.sim.qmsg
.........\..\Vhdl1.sim.rdb
.........\..\Vhdl1.sld_design_entry.sci
.........\..\Vhdl1.sld_design_entry_dsc.sci
.........\..\Vhdl1.syn_hier_info
.........\..\Vhdl1.tan.qmsg
.........\..\Vhdl1.tis_db_list.ddb
.........\..\wed.wsf
.........\Vhdl1.asm.rpt
.........\Vhdl1.cdf
.........\Vhdl1.done
.........\Vhdl1.dpf
.........\Vhdl1.fit.rpt
.........\Vhdl1.fit.smsg
.........\Vhdl1.fit.summary
.........\Vhdl1.flow.rpt
.........\Vhdl1.map.rpt
.........\Vhdl1.map.summary
.........\Vhdl1.pin
.........\Vhdl1.pof
.........\Vhdl1.qpf
.........\Vhdl1.qsf
.........\Vhdl1.qws
.........\Vhdl1.sim.rpt
.........\Vhdl1.sof
.........\Vhdl1.tan.rpt
.........\Vhdl1.tan.summary
.........\Vhdl1.vhd
.........\Vhdl1.vhd.bak
.........\Vhdl1.vwf
.........\Vhdl1_description.txt
.........\db
qiangdaqi
.........\..\add_sub_1nh.tdf
.........\..\prev_cmp_Vhdl1.asm.qmsg
.........\..\prev_cmp_Vhdl1.fit.qmsg
.........\..\prev_cmp_Vhdl1.map.qmsg
.........\..\prev_cmp_Vhdl1.qmsg
.........\..\prev_cmp_Vhdl1.sim.qmsg
.........\..\prev_cmp_Vhdl1.tan.qmsg
.........\..\Vhdl1.asm.qmsg
.........\..\Vhdl1.cbx.xml
.........\..\Vhdl1.cmp.cdb
.........\..\Vhdl1.cmp.ecobp
.........\..\Vhdl1.cmp.hdb
.........\..\Vhdl1.cmp.logdb
.........\..\Vhdl1.cmp.rdb
.........\..\Vhdl1.cmp.tdb
.........\..\Vhdl1.cmp0.ddb
.........\..\Vhdl1.cmp_bb.hdb
.........\..\Vhdl1.cmp_bb.logdb
.........\..\Vhdl1.cmp_bb.rcf
.........\..\Vhdl1.dbp
.........\..\Vhdl1.db_info
.........\..\Vhdl1.eco.cdb
.........\..\Vhdl1.eds_overflow
.........\..\Vhdl1.fit.qmsg
.........\..\Vhdl1.hier_info
.........\..\Vhdl1.hif
.........\..\Vhdl1.map.cdb
.........\..\Vhdl1.map.ecobp
.........\..\Vhdl1.map.hdb
.........\..\Vhdl1.map.logdb
.........\..\Vhdl1.map.qmsg
.........\..\Vhdl1.map_bb.logdb
.........\..\Vhdl1.pre_map.cdb
.........\..\Vhdl1.pre_map.hdb
.........\..\Vhdl1.psp
.........\..\Vhdl1.pss
.........\..\Vhdl1.rtlv.hdb
.........\..\Vhdl1.rtlv_sg.cdb
.........\..\Vhdl1.rtlv_sg_swap.cdb
.........\..\Vhdl1.sgdiff.cdb
.........\..\Vhdl1.sgdiff.hdb
.........\..\Vhdl1.sim.cvwf
.........\..\Vhdl1.sim.hdb
.........\..\Vhdl1.sim.qmsg
.........\..\Vhdl1.sim.rdb
.........\..\Vhdl1.sld_design_entry.sci
.........\..\Vhdl1.sld_design_entry_dsc.sci
.........\..\Vhdl1.syn_hier_info
.........\..\Vhdl1.tan.qmsg
.........\..\Vhdl1.tis_db_list.ddb
.........\..\wed.wsf
.........\Vhdl1.asm.rpt
.........\Vhdl1.cdf
.........\Vhdl1.done
.........\Vhdl1.dpf
.........\Vhdl1.fit.rpt
.........\Vhdl1.fit.smsg
.........\Vhdl1.fit.summary
.........\Vhdl1.flow.rpt
.........\Vhdl1.map.rpt
.........\Vhdl1.map.summary
.........\Vhdl1.pin
.........\Vhdl1.pof
.........\Vhdl1.qpf
.........\Vhdl1.qsf
.........\Vhdl1.qws
.........\Vhdl1.sim.rpt
.........\Vhdl1.sof
.........\Vhdl1.tan.rpt
.........\Vhdl1.tan.summary
.........\Vhdl1.vhd
.........\Vhdl1.vhd.bak
.........\Vhdl1.vwf
.........\Vhdl1_description.txt
.........\db
qiangdaqi