文件名称:verilogChapter-3
- 所属分类：
- VHDL编程
- 资源属性：
- [ASM] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 475kb
- 下载次数：
- 0次
- 提 供 者：
- Alice*****
- 相关连接：
- 无
- 下载说明：
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续chapter02,给出了从入门到工程应用的一些实例，可以帮助初学者通过学习实例了解和掌握硬件描述语言的基本知识。-Continued chapter02, from entry to the project are given some examples of applications that can help beginners learn instance by hardware descr iption language to understand and master the basics.
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下载文件列表
Chapter-3\3.1\add_tree_mult.cr.mti
.........\...\add_tree_mult.mpf
.........\...\add_tree_mult.v
.........\...\add_tree_mult_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-2.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\add_tree_mult.bmp
.........\...\....\add_tree_mult_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\add_tree_mult\_primary.dat
.........\...\....\.............\_primary.vhd
.........\...\....\.............\verilog.asm
.........\...\....\add_tree_mult
.........\...\....\............._testbench\_primary.dat
.........\...\....\.......................\_primary.vhd
.........\...\....\.......................\verilog.asm
.........\...\....\add_tree_mult_testbench
.........\...\work
.........\3.1
.........\..2\lookup_mult.cr.mti
.........\...\lookup_mult.mpf
.........\...\lookup_mult.v
.........\...\lookup_mult_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-5.bmp
.........\...\.....\嗾3-6.bmp
.........\...\.....\表3-1.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\lookup.bmp
.........\...\....\lookup_mult.bmp
.........\...\....\lookup_mult_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\lookup\_primary.dat
.........\...\....\......\_primary.vhd
.........\...\....\......\verilog.asm
.........\...\....\lookup
.........\...\....\......_mult\_primary.dat
.........\...\....\...........\_primary.vhd
.........\...\....\...........\verilog.asm
.........\...\....\lookup_mult
.........\...\....\..........._testbench\_primary.dat
.........\...\....\.....................\_primary.vhd
.........\...\....\.....................\verilog.asm
.........\...\....\lookup_mult_testbench
.........\...\work
.........\3.2
.........\..3\mult_Booth.cr.mti
.........\...\mult_Booth.mpf
.........\...\mult_Booth.v
.........\...\mult_Booth_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-8.bmp
.........\...\.....\嗾3-9.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\mult_Booth.bmp
.........\...\....\mult_Booth_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\@controller_@booth\_primary.dat
.........\...\....\..................\_primary.vhd
.........\...\....\..................\verilog.asm
.........\...\....\@controller_@booth
.........\...\....\.datapath_@booth\_primary.dat
.........\...\....\................\_primary.vhd
.........\...\....\................\verilog.asm
.........\...\....\@datapath_@booth
.........\...\....\mult_@booth\_primary.dat
.........\...\....\...........\_primary.vhd
.........\...\....\...........\verilog.asm
.........\...\....\mult_@booth
.........\...\....\..........._testbench\_primary.dat
.........\...\....\.....................\_primary.vhd
.........\...\....\.....................\verilog.asm
.........\...\....\mult_@booth_testbench
.........\...\work
.........\3.3
.........\..4\in_data.load_mem
.........\...\out_data.txt
.........\...\shift_divider.cr.mti
.........\...\shift_divider.mpf
.........\...\shift_divider.v
.........\...\shift_divider_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-12.bmp
.........\...\.....\表3-2.bmp
.........\...\chart
.........\...\add_tree_mult.mpf
.........\...\add_tree_mult.v
.........\...\add_tree_mult_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-2.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\add_tree_mult.bmp
.........\...\....\add_tree_mult_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\add_tree_mult\_primary.dat
.........\...\....\.............\_primary.vhd
.........\...\....\.............\verilog.asm
.........\...\....\add_tree_mult
.........\...\....\............._testbench\_primary.dat
.........\...\....\.......................\_primary.vhd
.........\...\....\.......................\verilog.asm
.........\...\....\add_tree_mult_testbench
.........\...\work
.........\3.1
.........\..2\lookup_mult.cr.mti
.........\...\lookup_mult.mpf
.........\...\lookup_mult.v
.........\...\lookup_mult_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-5.bmp
.........\...\.....\嗾3-6.bmp
.........\...\.....\表3-1.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\lookup.bmp
.........\...\....\lookup_mult.bmp
.........\...\....\lookup_mult_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\lookup\_primary.dat
.........\...\....\......\_primary.vhd
.........\...\....\......\verilog.asm
.........\...\....\lookup
.........\...\....\......_mult\_primary.dat
.........\...\....\...........\_primary.vhd
.........\...\....\...........\verilog.asm
.........\...\....\lookup_mult
.........\...\....\..........._testbench\_primary.dat
.........\...\....\.....................\_primary.vhd
.........\...\....\.....................\verilog.asm
.........\...\....\lookup_mult_testbench
.........\...\work
.........\3.2
.........\..3\mult_Booth.cr.mti
.........\...\mult_Booth.mpf
.........\...\mult_Booth.v
.........\...\mult_Booth_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-8.bmp
.........\...\.....\嗾3-9.bmp
.........\...\chart
.........\...\wave\Thumbs.db
.........\...\....\mult_Booth.bmp
.........\...\....\mult_Booth_testbench.bmp
.........\...\wave
.........\...\.ork\_info
.........\...\....\@controller_@booth\_primary.dat
.........\...\....\..................\_primary.vhd
.........\...\....\..................\verilog.asm
.........\...\....\@controller_@booth
.........\...\....\.datapath_@booth\_primary.dat
.........\...\....\................\_primary.vhd
.........\...\....\................\verilog.asm
.........\...\....\@datapath_@booth
.........\...\....\mult_@booth\_primary.dat
.........\...\....\...........\_primary.vhd
.........\...\....\...........\verilog.asm
.........\...\....\mult_@booth
.........\...\....\..........._testbench\_primary.dat
.........\...\....\.....................\_primary.vhd
.........\...\....\.....................\verilog.asm
.........\...\....\mult_@booth_testbench
.........\...\work
.........\3.3
.........\..4\in_data.load_mem
.........\...\out_data.txt
.........\...\shift_divider.cr.mti
.........\...\shift_divider.mpf
.........\...\shift_divider.v
.........\...\shift_divider_testbench.v
.........\...\transcript
.........\...\vsim.wlf
.........\...\chart\Thumbs.db
.........\...\.....\嗾3-12.bmp
.........\...\.....\表3-2.bmp
.........\...\chart