文件名称:counter
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计数器，使用VHDL语言编写的数字电路模块，他的功能是完成任意模的计数-Counter, using the VHDL language in the digital circuit modules, whose function is to count any mode
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下载文件列表
counter\count.bdf
.......\count.bsf
.......\count.vhd
.......\count.vwf
.......\counter.asm.rpt
.......\counter.bdf
.......\counter.done
.......\counter.fit.rpt
.......\counter.fit.smsg
.......\counter.fit.summary
.......\counter.flow.rpt
.......\counter.map.rpt
.......\counter.map.summary
.......\counter.pin
.......\counter.pof
.......\counter.qpf
.......\counter.qsf
.......\counter.sim.rpt
.......\counter.sof
.......\counter.tan.rpt
.......\counter.tan.summary
.......\counter.vwf
.......\counter_assignment_defaults.qdf
.......\div.bsf
.......\div.vhd
.......\div.vwf
.......\mux4_1.bsf
.......\mux4_1.vhd
.......\mux4_1.vwf
.......\counter\count.bdf
.......\.......\count.bsf
.......\.......\count.vhd
.......\.......\count.vwf
.......\.......\counter.asm.rpt
.......\.......\counter.bdf
.......\.......\counter.done
.......\.......\counter.fit.rpt
.......\.......\counter.fit.smsg
.......\.......\counter.fit.summary
.......\.......\counter.flow.rpt
.......\.......\counter.map.rpt
.......\.......\counter.map.summary
.......\.......\counter.pin
.......\.......\counter.pof
.......\.......\counter.qpf
.......\.......\counter.qsf
.......\.......\counter.qws
.......\.......\counter.sim.rpt
.......\.......\counter.sof
.......\.......\counter.tan.rpt
.......\.......\counter.tan.summary
.......\.......\counter.vwf
.......\.......\counter_assignment_defaults.qdf
.......\.......\div.bsf
.......\.......\div.vhd
.......\.......\div.vwf
.......\.......\mux4_1.bsf
.......\.......\mux4_1.vhd
.......\.......\mux4_1.vwf
.......\.......\db\add_sub_3rh.tdf
.......\.......\..\add_sub_4rh.tdf
.......\.......\..\counter.asm.qmsg
.......\.......\..\counter.cbx.xml
.......\.......\..\counter.cmp.cdb
.......\.......\..\counter.cmp.hdb
.......\.......\..\counter.cmp.logdb
.......\.......\..\counter.cmp.rdb
.......\.......\..\counter.cmp.tdb
.......\.......\..\counter.cmp0.ddb
.......\.......\..\counter.dbp
.......\.......\..\counter.db_info
.......\.......\..\counter.eco.cdb
.......\.......\..\counter.eds_overflow
.......\.......\..\counter.fit.qmsg
.......\.......\..\counter.fnsim.cdb
.......\.......\..\counter.fnsim.hdb
.......\.......\..\counter.fnsim.qmsg
.......\.......\..\counter.hier_info
.......\.......\..\counter.hif
.......\.......\..\counter.map.cdb
.......\.......\..\counter.map.hdb
.......\.......\..\counter.map.logdb
.......\.......\..\counter.map.qmsg
.......\.......\..\counter.pre_map.cdb
.......\.......\..\counter.pre_map.hdb
.......\.......\..\counter.psp
.......\.......\..\counter.pss
.......\.......\..\counter.rtlv.hdb
.......\.......\..\counter.rtlv_sg.cdb
.......\.......\..\counter.rtlv_sg_swap.cdb
.......\.......\..\counter.sgdiff.cdb
.......\.......\..\counter.sgdiff.hdb
.......\.......\..\counter.signalprobe.cdb
.......\.......\..\counter.sim.cvwf
.......\.......\..\counter.sim.hdb
.......\.......\..\counter.sim.qmsg
.......\.......\..\counter.sim.rdb
.......\.......\..\counter.sim.vwf
.......\.......\..\counter.simfam
.......\.......\..\counter.sld_design_entry.sci
.......\count.bsf
.......\count.vhd
.......\count.vwf
.......\counter.asm.rpt
.......\counter.bdf
.......\counter.done
.......\counter.fit.rpt
.......\counter.fit.smsg
.......\counter.fit.summary
.......\counter.flow.rpt
.......\counter.map.rpt
.......\counter.map.summary
.......\counter.pin
.......\counter.pof
.......\counter.qpf
.......\counter.qsf
.......\counter.sim.rpt
.......\counter.sof
.......\counter.tan.rpt
.......\counter.tan.summary
.......\counter.vwf
.......\counter_assignment_defaults.qdf
.......\div.bsf
.......\div.vhd
.......\div.vwf
.......\mux4_1.bsf
.......\mux4_1.vhd
.......\mux4_1.vwf
.......\counter\count.bdf
.......\.......\count.bsf
.......\.......\count.vhd
.......\.......\count.vwf
.......\.......\counter.asm.rpt
.......\.......\counter.bdf
.......\.......\counter.done
.......\.......\counter.fit.rpt
.......\.......\counter.fit.smsg
.......\.......\counter.fit.summary
.......\.......\counter.flow.rpt
.......\.......\counter.map.rpt
.......\.......\counter.map.summary
.......\.......\counter.pin
.......\.......\counter.pof
.......\.......\counter.qpf
.......\.......\counter.qsf
.......\.......\counter.qws
.......\.......\counter.sim.rpt
.......\.......\counter.sof
.......\.......\counter.tan.rpt
.......\.......\counter.tan.summary
.......\.......\counter.vwf
.......\.......\counter_assignment_defaults.qdf
.......\.......\div.bsf
.......\.......\div.vhd
.......\.......\div.vwf
.......\.......\mux4_1.bsf
.......\.......\mux4_1.vhd
.......\.......\mux4_1.vwf
.......\.......\db\add_sub_3rh.tdf
.......\.......\..\add_sub_4rh.tdf
.......\.......\..\counter.asm.qmsg
.......\.......\..\counter.cbx.xml
.......\.......\..\counter.cmp.cdb
.......\.......\..\counter.cmp.hdb
.......\.......\..\counter.cmp.logdb
.......\.......\..\counter.cmp.rdb
.......\.......\..\counter.cmp.tdb
.......\.......\..\counter.cmp0.ddb
.......\.......\..\counter.dbp
.......\.......\..\counter.db_info
.......\.......\..\counter.eco.cdb
.......\.......\..\counter.eds_overflow
.......\.......\..\counter.fit.qmsg
.......\.......\..\counter.fnsim.cdb
.......\.......\..\counter.fnsim.hdb
.......\.......\..\counter.fnsim.qmsg
.......\.......\..\counter.hier_info
.......\.......\..\counter.hif
.......\.......\..\counter.map.cdb
.......\.......\..\counter.map.hdb
.......\.......\..\counter.map.logdb
.......\.......\..\counter.map.qmsg
.......\.......\..\counter.pre_map.cdb
.......\.......\..\counter.pre_map.hdb
.......\.......\..\counter.psp
.......\.......\..\counter.pss
.......\.......\..\counter.rtlv.hdb
.......\.......\..\counter.rtlv_sg.cdb
.......\.......\..\counter.rtlv_sg_swap.cdb
.......\.......\..\counter.sgdiff.cdb
.......\.......\..\counter.sgdiff.hdb
.......\.......\..\counter.signalprobe.cdb
.......\.......\..\counter.sim.cvwf
.......\.......\..\counter.sim.hdb
.......\.......\..\counter.sim.qmsg
.......\.......\..\counter.sim.rdb
.......\.......\..\counter.sim.vwf
.......\.......\..\counter.simfam
.......\.......\..\counter.sld_design_entry.sci