文件名称:VerilogHDL_Emample
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其他说明：
文中实例基本都不依赖实际具体的硬件，可以在任何厂家任何系列的FPGA/CPLD下综合使用（如Altera等，只要资源充足），还可以利用Synoposy公司的工艺库影射到ASIC，完全可以当作软IPCore使用。
-Other notes: the text does not rely on practical and concrete examples of basic hardware, manufacturers of any series in any of the FPGA/CPLD under the integrated use (such as Altera, as long as adequate resources), but also the company' s technology can be used Synoposy library mapping to ASIC, completely can be used as a soft IPCore.
文中实例基本都不依赖实际具体的硬件，可以在任何厂家任何系列的FPGA/CPLD下综合使用（如Altera等，只要资源充足），还可以利用Synoposy公司的工艺库影射到ASIC，完全可以当作软IPCore使用。
-Other notes: the text does not rely on practical and concrete examples of basic hardware, manufacturers of any series in any of the FPGA/CPLD under the integrated use (such as Altera, as long as adequate resources), but also the company' s technology can be used Synoposy library mapping to ASIC, completely can be used as a soft IPCore.
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VerilogHDL_Emample.pdf