文件名称:source
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本源码是 基于VERILOG的SDRAM的开发与实现
并能实现 刷新，预充电，突发长度为8字节等功能 已验证，可用-The source is based on the SDRAM VERILOG development and implementation and to achieve refresh, precharge, a burst length of 8 bytes and other functions have been verified, the available
并能实现 刷新，预充电，突发长度为8字节等功能 已验证，可用-The source is based on the SDRAM VERILOG development and implementation and to achieve refresh, precharge, a burst length of 8 bytes and other functions have been verified, the available
(系统自动生成,下载前可以参看下载内容)
下载文件列表
source\para.v
......\pll.v
......\sdram_cmd.v
......\sdram_ctrl_top.v
......\sdram_ctrl_top_test.v
......\sdram_data_path.v
......\sdram_state_ctrl.v
......\sys_clk_ctrl.v
source
......\pll.v
......\sdram_cmd.v
......\sdram_ctrl_top.v
......\sdram_ctrl_top_test.v
......\sdram_data_path.v
......\sdram_state_ctrl.v
......\sys_clk_ctrl.v
source