文件名称:sbiu_phase_1

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 273kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • nar****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!
下载
别用迅雷、360浏览器下载。
如迅雷强制弹出,可右键点击选“另存为”。
失败请重下,重下不扣分。

介绍说明--下载内容均来自于网络,请自行研究使用

VHDL SYSTEM VERILOG CODES
(系统自动生成,下载前可以参看下载内容)

下载文件列表

sbiu_phase_1\sbiu_tb

............\.......\compile_all.do

............\.......\compile_sbiu.do

............\.......\ds_intf

............\.......\.......\ds_drvr.sv

............\.......\.......\ds_intf.sv

............\.......\.......\ds_types.sv

............\.......\env.sv

............\.......\run_init_test.do

............\.......\run_sanity_test.do

............\.......\sbiu

............\.......\....\core

............\.......\....\....\sbiu_core.sv

............\.......\....\sbiu_top.v

............\.......\sbiu_tb.cr.mti

............\.......\sbiu_tb.mpf

............\.......\tests

............\.......\.....\init_test.sv

............\.......\.....\sanity_test.sv

............\.......\us_intf

............\.......\.......\us_drvr.sv

............\.......\.......\us_intf.sv

............\.......\.......\us_types.sv

............\.......\vsim.wlf

............\.......\wave.do

............\.......\work

............\.......\....\_info

............\.......\....\_temp

............\.......\....\.....\vlog06bak4

............\.......\....\.....\vlog224qks

............\.......\....\.....\vlog26ge46

............\.......\....\.....\vlog2fge16

............\.......\....\.....\vlog2izq4v

............\.......\....\.....\vlog2s7ggd

............\.......\....\.....\vlog4gx0jf

............\.......\....\.....\vlog53ewwg

............\.......\....\.....\vlog543whk

............\.......\....\.....\vlog81cgjw

............\.......\....\.....\vlog8hgg3v

............\.......\....\.....\vlog9198sy

............\.......\....\.....\vlogdi6w8j

............\.......\....\.....\vlogds3wvy

............\.......\....\.....\vlogdvd87g

............\.......\....\.....\vlogexc8n8

............\.......\....\.....\vlogha4ak0

............\.......\....\.....\vloghvkas5

............\.......\....\.....\vlogjczira

............\.......\....\.....\vlogjghhv0

............\.......\....\.....\vlogjmzima

............\.......\....\.....\vlogjrwcy4

............\.......\....\.....\vlogkwmnna

............\.......\....\.....\vlogm8ani5

............\.......\....\.....\vlognk16yc

............\.......\....\.....\vlognqx6xw

............\.......\....\.....\vlogrbribd

............\.......\....\.....\vlogrvwivb

............\.......\....\.....\vlogs0f2jx

............\.......\....\.....\vlogsqq2nt

............\.......\....\.....\vlogth228m

............\.......\....\.....\vlogths28r

............\.......\....\.....\vlogvqtnac

............\.......\....\.....\vlogxnifir

............\.......\....\_vmake

............\.......\....\ds_drvr_sv_unit

............\.......\....\...............\_primary.dat

............\.......\....\...............\_primary.dbs

............\.......\....\...............\_primary.vhd

............\.......\....\ds_intf_if

............\.......\....\..........\_primary.dat

............\.......\....\..........\_primary.dbs

............\.......\....\..........\_primary.vhd

............\.......\....\..........\verilog.asm

............\.......\....\..........\verilog.rw

............\.......\....\ds_types_sv_unit

............\.......\....\................\_primary.dat

............\.......\....\................\_primary.dbs

............\.......\....\................\_primary.vhd

............\.......\....\env_m

............\.......\....\.....\_primary.dat

............\.......\....\.....\_primary.dbs

............\.......\....\.....\_primary.vhd

............\.......\....\.....\verilog.asm

............\.......\....\.....\verilog.rw

............\.......\....\env_sv_unit

............\.......\....\...........\_primary.dat

............\.......\....\...........\_primary.dbs

............\.......\....\...........\_primary.vhd

............\.......\....\init_test

............\.......\....\.........\_primary.dat

............\.......\....\.........\_primary.dbs

............\.......\....\.........\_primary.vhd

............\.......\....\.........\verilog.asm

............\.......\....\.........\verilog.rw

............\.......\....\init_test_p

............\.......\....\...........\_primary.dat

............\.......\....\...........\_primary.dbs

............\.......\....\...........\_primary.vhd

............\.......

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台,提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度更多...
  • 请直接用浏览器下载本站内容,不要使用迅雷之类的下载软件,用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*主  题:
*内  容:
*验 证 码:

源码中国 www.ymcn.org