文件名称:FIr
介绍说明--下载内容均来自于网络,请自行研究使用
非常全面的滤波器资料,相信对滤波器设计很有帮助-The filter is very comprehensive information, I believe very helpful filter design
(系统自动生成,下载前可以参看下载内容)
下载文件列表
文件名 | 大小 | 更新时间 |
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FIR滤波器\chapter_08filterApp.ppt | ||
.........\Finite impulse response - Wikipedia | the free encyclopedia.htm | |
.........\FIR Filter Fits in an FPGA using a Bit Serial Approach.pdf | ||
.........\FIR 滤波器设计方案.pdf | ||
.........\FIR 滤波器设计方案小结.doc | ||
.........\FIR滤波器 FAQ.doc | ||
.........\FIR滤波器的FPGA高效实现和巧妙验证.pdf | ||
.........\~$ Microsoft Word 文档.doc | ||
.........\~$ATLAB信号处理工具箱进行FIR滤波器设计的三种方法.doc | ||
.........\~WRL3738.tmp | ||
.........\基于 MATLAB和 Quartus II 的 FIR 滤波器设计与仿真 .pdf | ||
.........\基于FPGA实现FIR数字滤波器的研究.nh | ||
.........\基于FPGA实现FIR滤波器的研究.pdf | ||
.........\基于FPGA的FIR滤波器的设计.kdh | ||
.........\基于FPGA的FIR滤波器的设计.pdf | ||
.........\基于FPGA的高速高阶FIR滤波器设计.kdh | ||
.........\基于FPGA的高阶FIR滤波器设计.nh | ||
.........\基于Matlab和FPGA的FIR数字滤波器设计及实现.pdf | ||
.........\数字信号处理的FPGA实现.pdf | ||
.........\数字滤波器原理及MATLAB实现.rar | ||
.........\数字滤波器总结.doc | ||
.........\有限脉冲响应 - 维基百科,自由的百科全书.htm | ||
.........\用 FPGA實現 FIR濾波器 .pdf | ||
.........\用MATLAB信号处理工具箱进行FIR滤波器设计的三种方法.doc | ||
.........\通信系统中FIR数字滤波器的设计研究.pdf | ||
.........\采用Xilinx器件实现DSP算法的绝佳资料\dsp-book.pdf | ||
.........\数字滤波器原理及MATLAB实现\数字滤波器原理.doc | ||
.........\..........................\MATLAB程序\fir_1.m | ||
.........\..........................\..........\fir_2.m | ||
.........\..........................\..........\fir_3.m | ||
.........\..........................\..........\shiyan4_1.m | ||
.........\串行DA算法实现16阶FIR滤波器\串行DA算法实现16阶FIR滤波器说明文档.pdf | ||
.........\...........................\da\adder_mac.v | ||
.........\...........................\..\ctrl_all.v | ||
.........\...........................\..\dacase8_1.v | ||
.........\...........................\..\dacase8_2.v | ||
.........\...........................\..\da_fir.prd | ||
.........\...........................\..\da_fir.prj | ||
.........\...........................\..\da_fir.qpf | ||
.........\...........................\..\DA_top.cr.mti | ||
.........\...........................\..\DA_top.mpf | ||
.........\...........................\..\DA_top.v | ||
.........\...........................\..\MUX_16X1_M.v | ||
.........\...........................\..\Q_258_0_15_0_.mif | ||
.........\...........................\..\Q_258_0_15_0_mif1.mif | ||
.........\...........................\..\readme.txt | ||
.........\...........................\..\shift_ram.v | ||
.........\...........................\..\veryclean.bat | ||
.........\...........................\..\work\_info | ||
.........\...........................\..\....\shift_ram\verilog.asm | ||
.........\...........................\..\....\.........\_primary.dat | ||
.........\...........................\..\....\.........\_primary.vhd | ||
.........\...........................\..\....\dacase8_2\verilog.asm | ||
.........\...........................\..\....\.........\_primary.dat | ||
.........\...........................\..\....\.........\_primary.vhd | ||
.........\...........................\..\....\........1\verilog.asm | ||
.........\...........................\..\....\.........\_primary.dat | ||
.........\...........................\..\....\.........\_primary.vhd | ||
.........\...........................\..\....\ctrl_all\verilog.asm | ||
.........\...........................\..\....\........\_primary.dat | ||
.........\...........................\..\....\........\_primary.vhd | ||
.........\...........................\..\....\adder_mac\verilog.asm | ||
.........\...........................\..\....\.........\_primary.dat | ||
.........\...........................\..\....\.........\_primary.vhd | ||
.........\...........................\..\....\@m@u@x_16@x1\verilog.asm | ||
.........\...........................\..\....\............\_primary.dat | ||
.........\...........................\..\....\............\_primary.vhd | ||
.........\...........................\..\....\.d@a_top_tb\verilog.asm | ||
.........\...........................\..\....\...........\_primary.dat | ||
.........\...........................\..\....\...........\_primary.vhd | ||
.........\...........................\..\....\........\verilog.asm | ||
.........\...........................\..\....\........\_primary.dat | ||
.........\...........................\..\.... |