文件名称:hw_for_sw
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vhdl. verilog,实用例程,希望对大家有帮助
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下载文件列表
fpga\hardware
....\........\blue_dsp.ucf
....\........\blue_dsp.vhd
....\........\bram.vhd
....\........\tb_blue_dsp.vhd
....\software
....\........\blade22.gif
....\........\blade24.gif
....\........\bluefpga.exe
....\........\bluelogo.gif
....\........\boatgirl.gif
....\........\dpcutil.lib
....\........\guiuser.tcl
....\........\guiwin.tcl
....\........\hubcygns.gif
....\........\hubsatst.gif
....\........\monet_be.gif
....\........\monet_br.gif
....\........\monet_se.gif
....\........\test0.tcl
....\........\test1.tcl
systemc\labs
.......\....\systemc_labs_readme.txt
.......\sols
.......\....\main_rtl.cpp
.......\....\systemc_sols_readme.txt
verilog\labs
.......\....\alu.v
.......\....\dsp.v
.......\....\dspcode.in
.......\....\fa.v
.......\....\gold.out
.......\....\inst_dec.v
.......\....\ram16x4.v
.......\....\reg_alu.v
.......\....\tb_alu.v
.......\....\tb_dsp.v
.......\....\tb_fa.v
.......\....\tb_inst.v
.......\....\tb_ralu.v
.......\....\tb_ram.v
.......\....\tb_xor.v
.......\....\xor_gate.v
.......\sols
.......\....\alu1.v
.......\....\alu1_sim.do
.......\....\alu2.v
.......\....\codec.v
.......\....\dsp.v
.......\....\dspcode.in
.......\....\fa.v
.......\....\gold.out
.......\....\inst_dec.v
.......\....\ram16x4.v
.......\....\reg_alu1.v
.......\....\reg_alu2.v
.......\....\sar_beh3.v
.......\....\tb_alu.v
.......\....\tb_codec.v
.......\....\tb_dsp.v
.......\....\tb_fa.v
.......\....\tb_inst.v
.......\....\tb_ralu.v
.......\....\tb_ram.v
.......\....\tb_sar.v
.......\....\tb_xor.v
.......\....\ver_ans.txt
.......\....\xor_gate.v
.hdl\labs
....\....\ALU.VHD
....\....\DSP.VHD
....\....\DSP_PACK.VHD
....\....\dspcode.in
....\....\fa.vhd
....\....\gold.out
....\....\INST_DEC.VHD
....\....\RAM16X4.VHD
....\....\reg_alu.vhd
....\....\TB_ALU.VHD
....\....\TB_DSP.VHD
....\....\tb_fa.vhd
....\....\tb_inst.vhd
....\....\tb_ralu.vhd
....\....\tb_ram.vhd
....\....\tb_xor.vhd
....\....\xor_gate.vhd
....\sols
....\....\alu1.vhd
....\....\alu1_sim.do
....\....\alu2.vhd
....\....\codec.vhd
....\....\dsp.vhd
....\....\DSP_PACK.VHD
....\....\dspcode.in
....\....\fa.vhd
....\....\gold.out
....\....\INST_DEC.VHD
....\....\RAM16X4.VHD
....\....\reg_alu1.vhd
....\....\reg_alu2.vhd
....\........\blue_dsp.ucf
....\........\blue_dsp.vhd
....\........\bram.vhd
....\........\tb_blue_dsp.vhd
....\software
....\........\blade22.gif
....\........\blade24.gif
....\........\bluefpga.exe
....\........\bluelogo.gif
....\........\boatgirl.gif
....\........\dpcutil.lib
....\........\guiuser.tcl
....\........\guiwin.tcl
....\........\hubcygns.gif
....\........\hubsatst.gif
....\........\monet_be.gif
....\........\monet_br.gif
....\........\monet_se.gif
....\........\test0.tcl
....\........\test1.tcl
systemc\labs
.......\....\systemc_labs_readme.txt
.......\sols
.......\....\main_rtl.cpp
.......\....\systemc_sols_readme.txt
verilog\labs
.......\....\alu.v
.......\....\dsp.v
.......\....\dspcode.in
.......\....\fa.v
.......\....\gold.out
.......\....\inst_dec.v
.......\....\ram16x4.v
.......\....\reg_alu.v
.......\....\tb_alu.v
.......\....\tb_dsp.v
.......\....\tb_fa.v
.......\....\tb_inst.v
.......\....\tb_ralu.v
.......\....\tb_ram.v
.......\....\tb_xor.v
.......\....\xor_gate.v
.......\sols
.......\....\alu1.v
.......\....\alu1_sim.do
.......\....\alu2.v
.......\....\codec.v
.......\....\dsp.v
.......\....\dspcode.in
.......\....\fa.v
.......\....\gold.out
.......\....\inst_dec.v
.......\....\ram16x4.v
.......\....\reg_alu1.v
.......\....\reg_alu2.v
.......\....\sar_beh3.v
.......\....\tb_alu.v
.......\....\tb_codec.v
.......\....\tb_dsp.v
.......\....\tb_fa.v
.......\....\tb_inst.v
.......\....\tb_ralu.v
.......\....\tb_ram.v
.......\....\tb_sar.v
.......\....\tb_xor.v
.......\....\ver_ans.txt
.......\....\xor_gate.v
.hdl\labs
....\....\ALU.VHD
....\....\DSP.VHD
....\....\DSP_PACK.VHD
....\....\dspcode.in
....\....\fa.vhd
....\....\gold.out
....\....\INST_DEC.VHD
....\....\RAM16X4.VHD
....\....\reg_alu.vhd
....\....\TB_ALU.VHD
....\....\TB_DSP.VHD
....\....\tb_fa.vhd
....\....\tb_inst.vhd
....\....\tb_ralu.vhd
....\....\tb_ram.vhd
....\....\tb_xor.vhd
....\....\xor_gate.vhd
....\sols
....\....\alu1.vhd
....\....\alu1_sim.do
....\....\alu2.vhd
....\....\codec.vhd
....\....\dsp.vhd
....\....\DSP_PACK.VHD
....\....\dspcode.in
....\....\fa.vhd
....\....\gold.out
....\....\INST_DEC.VHD
....\....\RAM16X4.VHD
....\....\reg_alu1.vhd
....\....\reg_alu2.vhd