文件名称:mypjct

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 68kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • yan****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!
下载
别用迅雷、360浏览器下载。
如迅雷强制弹出,可右键点击选“另存为”。
失败请重下,重下不扣分。

介绍说明--下载内容均来自于网络,请自行研究使用

自己的一次设计,用verilog语言实现的一个自动售票机的设计-One' s own design, using verilog language implementation of the design of an automatic vending machine
(系统自动生成,下载前可以参看下载内容)

下载文件列表

mypjct\automatic_sell\smartgen\smartgen.aws

......\..............\hdl\automatic_sell.v

......\..............\...\debouncing.v

......\..............\viewdraw\vf\project.lst

......\..............\........\viewdraw.ini

......\..............\simulation\run.do

......\..............\..........\modelsim.log

......\..............\..........\presynth\_info

......\..............\..........\........\.temp\vlogtd8mtc

......\..............\..........\........\.....\vlog7gz9w4

......\..............\..........\........\_vmake

......\..............\..........\........\automatic_sell\_primary.vhd

......\..............\..........\........\..............\verilog.psm

......\..............\..........\........\..............\_primary.dbs

......\..............\..........\........\..............\_primary.dat

......\..............\..........\........\debouncing\_primary.vhd

......\..............\..........\........\..........\verilog.psm

......\..............\..........\........\..........\_primary.dbs

......\..............\..........\........\..........\_primary.dat

......\..............\..........\........\stimulus\_primary.vhd

......\..............\..........\........\........\verilog.psm

......\..............\..........\........\........\_primary.dbs

......\..............\..........\........\........\_primary.dat

......\..............\..........\........\tb_clock_minmax\_primary.vhd

......\..............\..........\........\...............\verilog.psm

......\..............\..........\........\...............\_primary.dbs

......\..............\..........\........\...............\_primary.dat

......\..............\..........\........\.estbench\_primary.vhd

......\..............\..........\........\.........\verilog.psm

......\..............\..........\........\.........\_primary.dbs

......\..............\..........\........\.........\_primary.dat

......\..............\..........\vsim.wlf

......\..............\..........\modelsim.ini.sav

......\..............\..........\modelsim.ini

......\..............\.ynthesis\stdout.log

......\..............\.........\backup\automatic_sell.srr

......\..............\.........\run_options.txt

......\..............\.........\automatic_sell.tlg

......\..............\.........\automatic_sell.so

......\..............\.........\automatic_sell_syn.prd

......\..............\.........\automatic_sell_syn.prj

......\..............\.........\automatic_sell.srr

......\..............\.timulus\automatic_sell.hpj

......\..............\........\waveperl.log

......\..............\........\BtimErrors.log

......\..............\........\files_to_build.txt

......\..............\........\automatic_sell_tbench.v

......\..............\........\automatic_sell_tbench.btim

......\..............\........\automatic_sell.dsk

......\..............\........\automatic_sell_tbench.bk

......\..............\designer\impl1\automatic_sell.ide_des

......\..............\........\.....\debouncing.ide_des

......\..............\automatic_sell.prj

......\..............\simulation\presynth\_temp

......\..............\..........\........\automatic_sell

......\..............\..........\........\debouncing

......\..............\..........\........\stimulus

......\..............\..........\........\tb_clock_minmax

......\..............\..........\........\testbench

......\..............\designer\impl1\simulation

......\..............\viewdraw\vf

......\..............\........\sch

......\..............\........\sym

......\..............\........\wir

......\..............\simulation\presynth

......\..............\.ynthesis\syntmp

......\..............\.........\coreip

......\..............\.........\backup

......\..............\designer\impl1

......\..............\smartgen

......\..............\hdl

......\..............\constraint

......\..............\viewdraw

......\..............\component

......\..............\coreconsole

......\..............\simulation

......\..............\synthesis

......\..............\phy_synthesis

......\..............\stimulus

......\..............\designer

......\automatic_sell

mypjct

相关说明

  • 本站资源为会员上传分享交流与学习,如有侵犯您的权益,请联系我们删除.
  • 本站是交换下载平台,提供交流渠道,下载内容来自于网络,除下载问题外,其它问题请自行百度更多...
  • 请直接用浏览器下载本站内容,不要使用迅雷之类的下载软件,用WinRAR最新版进行解压.
  • 如果您发现内容无法下载,请稍后再次尝试;或者到消费记录里找到下载记录反馈给我们.
  • 下载后发现下载的内容跟说明不相乎,请到消费记录里找到下载记录反馈给我们,经确认后退回积分.
  • 如下载前有疑问,可以通过点击"提供者"的名字,查看对方的联系方式,联系对方咨询.

相关评论

暂无评论内容.

发表评论

*主  题:
*内  容:
*验 证 码:

源码中国 www.ymcn.org