文件名称:VHDL_100example
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vhdl编程100例，初学者可以参考下，希望对大家有帮助-vhdl programming 100 cases, beginners can refer to, hopefully help to everyone
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下载文件列表
VHDL 100例\200441123245276683\100vhdl例子\10_function\10_bit_to_int.vhd
..........\..................\...........\...........\README.TXT
..........\..................\...........\.1_wiredor\11_wiredor.vhd
..........\..................\...........\..........\README.TXT
..........\..................\...........\.2_convert\12_convert.vhd
..........\..................\...........\..........\README.TXT
..........\..................\...........\.3_SHL\13_SHL.VHD
..........\..................\...........\......\README.TXT
..........\..................\...........\.4_MVL7_functions\14_MVL7_functions.vhd
..........\..................\...........\.................\README.TXT
..........\..................\...........\.5_MUX41\15_MUX41.VHD
..........\..................\...........\........\15_MVL7_functions.vhd
..........\..................\...........\........\15_MVL7_syn_types.vhd
..........\..................\...........\........\15_test_vectors_mux41.vhd
..........\..................\...........\........\15_TYPES.VHD
..........\..................\...........\........\README.TXT
..........\..................\...........\.6_MUX\16_multiple_mux.vhd
..........\..................\...........\......\16_MVL7_functions.vhd
..........\..................\...........\......\16_test_vectors.vhd
..........\..................\...........\......\16_TYPES.VHD
..........\..................\...........\......\README.TXT
..........\..................\...........\......\TYPES.VHD
..........\..................\...........\.7_parity\17_parity.vhd
..........\..................\...........\.........\17_test_bench.vhd
..........\..................\...........\.........\README.TXT
..........\..................\...........\.8_LIB\18_tech_lib.vhd
..........\..................\...........\......\18_test_lib.vhd
..........\..................\...........\......\README.TXT
..........\..................\...........\.9_test_194\19_test_194.vhd
..........\..................\...........\._ADDER\1_ADDER\1_ADDER.exp
..........\..................\...........\.......\.......\files\L1.rpt
..........\..................\...........\.......\.......\.....\L2.rpt
..........\..................\...........\.......\.......\.....\L3.rpt
..........\..................\...........\.......\.......\workdirs\aa\ADDER.sim
..........\..................\...........\.......\.......\........\..\ADDER.syn
..........\..................\...........\.......\.......\........\..\Anal.info
..........\..................\...........\.......\.......\........\..\Anal.out
..........\..................\...........\.......\.......\........\WORK\Anal.info
..........\..................\...........\.......\.......\........\....\Anal.out
..........\..................\...........\.......\.......\........\....\BIT_RTL_ADDER.sim
..........\..................\...........\.......\.......\........\....\BIT_RTL_ADDER.syn
..........\..................\...........\.......\1_adder.acf
..........\..................\...........\.......\1_adder.hif
..........\..................\...........\.......\1_adder.mmf
..........\..................\...........\.......\1_ADDER.VHD
..........\..................\...........\.......\bir_rtl_adder.acf
..........\..................\...........\.......\bir_rtl_adder.hif
..........\..................\...........\.......\bir_rtl_adder.mmf
..........\..................\...........\.......\bir_rtl_adder.tdf
..........\..................\...........\.......\bit_rtl_adder.acf
..........\..................\...........\.......\bit_rtl_adder.hif
..........\..................\...........\.......\bit_rtl_adder.mmf
..........\..................\...........\.......\bit_rtl_adder.vhd
..........\..................\...........\.......\LIB.DLS
..........\..................\...........\.......\README.TXT
..........\..................\...........\.......\U2268397.DLS
..........\..................\...........\20_test_159\20_test_159.vhd
..........\..................\...........\.1_test_13a\21_test_13a.vhd
..........\..................\...........\.2_deadlock\22_deadlock.vhd
..........\..................\.
..........\..................\...........\...........\README.TXT
..........\..................\...........\.1_wiredor\11_wiredor.vhd
..........\..................\...........\..........\README.TXT
..........\..................\...........\.2_convert\12_convert.vhd
..........\..................\...........\..........\README.TXT
..........\..................\...........\.3_SHL\13_SHL.VHD
..........\..................\...........\......\README.TXT
..........\..................\...........\.4_MVL7_functions\14_MVL7_functions.vhd
..........\..................\...........\.................\README.TXT
..........\..................\...........\.5_MUX41\15_MUX41.VHD
..........\..................\...........\........\15_MVL7_functions.vhd
..........\..................\...........\........\15_MVL7_syn_types.vhd
..........\..................\...........\........\15_test_vectors_mux41.vhd
..........\..................\...........\........\15_TYPES.VHD
..........\..................\...........\........\README.TXT
..........\..................\...........\.6_MUX\16_multiple_mux.vhd
..........\..................\...........\......\16_MVL7_functions.vhd
..........\..................\...........\......\16_test_vectors.vhd
..........\..................\...........\......\16_TYPES.VHD
..........\..................\...........\......\README.TXT
..........\..................\...........\......\TYPES.VHD
..........\..................\...........\.7_parity\17_parity.vhd
..........\..................\...........\.........\17_test_bench.vhd
..........\..................\...........\.........\README.TXT
..........\..................\...........\.8_LIB\18_tech_lib.vhd
..........\..................\...........\......\18_test_lib.vhd
..........\..................\...........\......\README.TXT
..........\..................\...........\.9_test_194\19_test_194.vhd
..........\..................\...........\._ADDER\1_ADDER\1_ADDER.exp
..........\..................\...........\.......\.......\files\L1.rpt
..........\..................\...........\.......\.......\.....\L2.rpt
..........\..................\...........\.......\.......\.....\L3.rpt
..........\..................\...........\.......\.......\workdirs\aa\ADDER.sim
..........\..................\...........\.......\.......\........\..\ADDER.syn
..........\..................\...........\.......\.......\........\..\Anal.info
..........\..................\...........\.......\.......\........\..\Anal.out
..........\..................\...........\.......\.......\........\WORK\Anal.info
..........\..................\...........\.......\.......\........\....\Anal.out
..........\..................\...........\.......\.......\........\....\BIT_RTL_ADDER.sim
..........\..................\...........\.......\.......\........\....\BIT_RTL_ADDER.syn
..........\..................\...........\.......\1_adder.acf
..........\..................\...........\.......\1_adder.hif
..........\..................\...........\.......\1_adder.mmf
..........\..................\...........\.......\1_ADDER.VHD
..........\..................\...........\.......\bir_rtl_adder.acf
..........\..................\...........\.......\bir_rtl_adder.hif
..........\..................\...........\.......\bir_rtl_adder.mmf
..........\..................\...........\.......\bir_rtl_adder.tdf
..........\..................\...........\.......\bit_rtl_adder.acf
..........\..................\...........\.......\bit_rtl_adder.hif
..........\..................\...........\.......\bit_rtl_adder.mmf
..........\..................\...........\.......\bit_rtl_adder.vhd
..........\..................\...........\.......\LIB.DLS
..........\..................\...........\.......\README.TXT
..........\..................\...........\.......\U2268397.DLS
..........\..................\...........\20_test_159\20_test_159.vhd
..........\..................\...........\.1_test_13a\21_test_13a.vhd
..........\..................\...........\.2_deadlock\22_deadlock.vhd
..........\..................\.