文件名称:xapp856
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的SFI接口实现（VHDL，Verilog and doc）-SFI-4.1 16-Channel SDR Interface with
Bus Alignment
Bus Alignment
(系统自动生成,下载前可以参看下载内容)
下载文件列表
readme.txt
VERILOG
.......\BUS_ALIGN_MACHINE.v
.......\SDR_4TO1_16CHAN_RX.v
.......\SDR_4TO1_16CHAN_TX.v
VHDL
....\BUS_ALIGN_MACHINE.vhd
....\count_to_128.vhd
....\COUNT_TO_64.vhd
....\SDR_4TO1_16CHAN_RX.vhd
....\SDR_4TO1_16CHAN_TX.vhd
xapp856.pdf
VERILOG
.......\BUS_ALIGN_MACHINE.v
.......\SDR_4TO1_16CHAN_RX.v
.......\SDR_4TO1_16CHAN_TX.v
VHDL
....\BUS_ALIGN_MACHINE.vhd
....\count_to_128.vhd
....\COUNT_TO_64.vhd
....\SDR_4TO1_16CHAN_RX.vhd
....\SDR_4TO1_16CHAN_TX.vhd
xapp856.pdf