文件名称:SDRAMVerilogHDL
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FPGA控制串行AD（AD0804）,状态机实现，可以根据该程序实现数字电压计，数字温度计的设计-FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
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SDRAM控制器Verilog HDL源码
..........................\doc
..........................\readme_sdr_sdram.txt
..........................\sdr_sdram.pdf
..........................\simulation
..........................\..........\sdr_sdram_tb.v
..........................\source
..........................\......\altclklock.v
..........................\......\Command.v
..........................\......\compile_all.v
..........................\......\control_interface.v
..........................\......\Params.v
..........................\......\PLL1.v
..........................\......\sdr_data_path.v
..........................\......\sdr_data_path.v.bak
..........................\......\sdr_sdram.v
..........................\使用说明请参看右侧注释====〉〉.txt
..........................\doc
..........................\readme_sdr_sdram.txt
..........................\sdr_sdram.pdf
..........................\simulation
..........................\..........\sdr_sdram_tb.v
..........................\source
..........................\......\altclklock.v
..........................\......\Command.v
..........................\......\compile_all.v
..........................\......\control_interface.v
..........................\......\Params.v
..........................\......\PLL1.v
..........................\......\sdr_data_path.v
..........................\......\sdr_data_path.v.bak
..........................\......\sdr_sdram.v
..........................\使用说明请参看右侧注释====〉〉.txt