文件名称:UART
介绍说明－－下载内容均来自于网络，请自行研究使用
自己实用Verilog编写的UART程序，1位开始位，8位数据位，1位停止位，本测试程序配置完管脚后，实用串口大师发送数据，则返回数据为发送数据+1-Verilog prepared their own UART practical procedures to start a bit, 8 data bits, 1 stop bit, the test procedure End pin configuration, the utility serial Master to send data, send data back data+1
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UART
....\designer
....\........\impl1
....\........\.....\designer.log
....\........\.....\uart_test.adb
....\........\.....\uart_test.dtf
....\........\.....\.............\verify.log
....\........\.....\uart_test.ide_des
....\........\.....\uart_test.stp
....\........\.....\uart_test.tcl
....\hdl
....\...\rec.v
....\...\send.v
....\...\uart_test.v
....\simulation
....\..........\meminit.dat
....\..........\modelsim.ini
....\..........\modelsim.ini.sav
....\synthesis
....\.........\.recordref
....\.........\stdout.log
....\.........\syntmp
....\.........\......\sap.log
....\.........\......\uart_test.msg
....\.........\......\uart_test.plg
....\.........\traplog.tlg
....\.........\uart_test.areasrr
....\.........\uart_test.edn
....\.........\uart_test.fse
....\.........\uart_test.map
....\.........\uart_test.sdf
....\.........\uart_test.srd
....\.........\uart_test.srm
....\.........\uart_test.srr
....\.........\uart_test.srs
....\.........\uart_test.tlg
....\.........\uart_test_sdc.sdc
....\.........\uart_test_syn.prd
....\.........\uart_test_syn.prj
....\UART.prj
....\designer
....\........\impl1
....\........\.....\designer.log
....\........\.....\uart_test.adb
....\........\.....\uart_test.dtf
....\........\.....\.............\verify.log
....\........\.....\uart_test.ide_des
....\........\.....\uart_test.stp
....\........\.....\uart_test.tcl
....\hdl
....\...\rec.v
....\...\send.v
....\...\uart_test.v
....\simulation
....\..........\meminit.dat
....\..........\modelsim.ini
....\..........\modelsim.ini.sav
....\synthesis
....\.........\.recordref
....\.........\stdout.log
....\.........\syntmp
....\.........\......\sap.log
....\.........\......\uart_test.msg
....\.........\......\uart_test.plg
....\.........\traplog.tlg
....\.........\uart_test.areasrr
....\.........\uart_test.edn
....\.........\uart_test.fse
....\.........\uart_test.map
....\.........\uart_test.sdf
....\.........\uart_test.srd
....\.........\uart_test.srm
....\.........\uart_test.srr
....\.........\uart_test.srs
....\.........\uart_test.tlg
....\.........\uart_test_sdc.sdc
....\.........\uart_test_syn.prd
....\.........\uart_test_syn.prj
....\UART.prj