资源列表
[VHDL编程] New-Compressed-(zipped)-Folder-(4)
说明:verilog code for sequence detection implemented on FPGA using quartus simulator<MPJ> 在 2025-01-21 上传 | 大小:1kb | 下载:0
[VHDL编程] New-Compressed-(zipped)-Folder-(5)
说明:traffic light controller verilog code modelsim tested<MPJ> 在 2025-01-21 上传 | 大小:1kb | 下载:0
[VHDL编程] meexternalletterforcsvtu
说明:! E:\jogeshwer.zip: Cannot open E:\jogeshwer\RR4_mult_paper.docx The process cannot access the file because it is being used by another process. -! E:\jogeshwer.zip: Cannot open E:\jogeshwer\RR4_mult_paper.docx<anil> 在 2025-01-21 上传 | 大小:178kb | 下载:0
[VHDL编程] liushuideng
说明:使用ise写的并行流水灯,体验顺序执行和并行的概念,容易学习-Use ise write parallel water lights, concept experience sequential and parallel execution, and easy to learn<xinchunming> 在 2025-01-21 上传 | 大小:1kb | 下载:0
[VHDL编程] paral_to_serial
说明:用verilog HDL编写的并行接口转串行接口的程序。-The programming of parallel interface to serial interface with HDL verilog.<王> 在 2025-01-21 上传 | 大小:1kb | 下载:0
[VHDL编程] dengjingdu
说明:数字频率计,2015国赛题目,可实现所有功能,整形电路无问题的话,测量结果几乎无误差!-Digital frequency meter, the 2015 National Games, can achieve all the functions, no problem of the plastic circuit, the measurement results are almost no error!<xuin> 在 2025-01-21 上传 | 大小:4.26mb | 下载:0