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[VHDL编程15-IP-core

说明:15个免费的IP核 IP核源代码 -15 IP cores
<chris> 在 2025-01-20 上传 | 大小:4.37mb | 下载:0

[VHDL编程nios

说明:altera ep2c8V2 开发实例 timer uart I2C key interrupt 等-altera ep2c8V2 examples timer uart I2C key interrupt etc.
<chris> 在 2025-01-20 上传 | 大小:11.22mb | 下载:0

[VHDL编程SOPC_module

说明:sopc 常用模块 LCD_Delay LCD_EN delay_reset_block filter_200us-sopc module LCD_Delay LCD_EN delay_reset_block filter_200us
<chris> 在 2025-01-20 上传 | 大小:20kb | 下载:0

[VHDL编程verilog_m

说明:用verilog生成的m序列,包含四个.v的文件-verilog m sequence
<priscilla> 在 2025-01-20 上传 | 大小:6kb | 下载:0

[VHDL编程santhosh_verilog_adder

说明:This has code off multibit Adder. IT is written in verilog. The associated test bench for the verilog code is also attatched within the rar file. Uncompress the rar file and the file name describes the function of each
<santhosh> 在 2025-01-20 上传 | 大小:9kb | 下载:0

[VHDL编程santhosh_multiplier

说明:This has verilog code for multiplication.. It will be useful for beginners of verilog.. The testbench for multiplier is also attached with the file setup. Comments are welcome
<santhosh> 在 2025-01-20 上传 | 大小:9kb | 下载:0

[VHDL编程carrysel_adder_files

说明:This has code of carry select adder.. It is written in VHDL.. Hope its useful for beginners .. All the best-This has code of carry select adder.. It is written in VHDL.. Hope its useful for beginners .. All t
<santhosh> 在 2025-01-20 上传 | 大小:2kb | 下载:0

[VHDL编程ModelSim6.5_March_9_2009

说明:Modelsim6.5 2009年官方培训教程-Official Modelsim6.5 2009 Training Course
<王辉> 在 2025-01-20 上传 | 大小:4.09mb | 下载:0

[VHDL编程AlteraCycloneIIFPGAStarterBoard

说明:Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
<王辉> 在 2025-01-20 上传 | 大小:231kb | 下载:0

[VHDL编程ss

说明:DE2开发板 sopc开发例程 友经科技提供-DE2 development board sopc the development of science and technology provided by the Friends of routine
<xinzhi> 在 2025-01-20 上传 | 大小:2.22mb | 下载:0

[VHDL编程two_d_dct_serial

说明:二维DCT变换,采用查找表的方法实现算法,分别通过列变换,再通过行变换,通过加法器乘法器以及流水线技术得出更快的结果!-two-dimention DCTtransform,the algorithm was implemented by look up table,via row trasforming and colum trasforming respectively
<chenguohao> 在 2025-01-20 上传 | 大小:23kb | 下载:0

[VHDL编程sdr_sdram

说明:文章详细讲述了sdr_sdram控制器的使用和编程思想-sdr_sdram
<chentao> 在 2025-01-20 上传 | 大小:685kb | 下载:0
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