资源列表
[VHDL编程] multiplier
说明:Example of doing multiplication showing how to use variable with in process how to use for loop statement algorithm of multiplication<suresh> 在 2025-02-05 上传 | 大小:1kb | 下载:0
[VHDL编程] MEMORY_CONTROLLER_ASSIGNMENT
说明:memory controller design in verilog<arun> 在 2025-02-05 上传 | 大小:1.52mb | 下载:0
[VHDL编程] PERL_PROGRAM
说明:perl program for generating test vector and veryfying test vector useful for VHDL design verification<arun> 在 2025-02-05 上传 | 大小:2kb | 下载:0
[VHDL编程] paomadeng
说明:用verilog写的跑马灯,已经调试成功,很好用-Use verilog to write marquees, has been debugged, useful<tangxiaolei> 在 2025-02-05 上传 | 大小:307kb | 下载:0
[VHDL编程] counter
说明:用verilog写的计数器,可用于分频等多种功能。已经调试成功很好用-Written with verilog counter, can be used for frequency and other functions. Has been very good success with debugging<tangxiaolei> 在 2025-02-05 上传 | 大小:2kb | 下载:0
[VHDL编程] Xil3SD1800A_MIG
说明:基于xc3sd1800afg676的开发板的DDR2的控制器的IPCORE,提供完整的代码和UCF。系统时钟频率为125Mhz。-The development board based on xc3sd1800afg676 DDR2 controller of IPCORE, provide a complete code and UCF. System clock frequency of 125Mhz.<sonicecho> 在 2025-02-05 上传 | 大小:1.16mb | 下载:0