资源列表
[VHDL编程] multiplexor
说明:multiplexor 3x1 bites is done by me on cla-multiplexor 3x1 bites is done by me on class<titokifi> 在 2024-11-19 上传 | 大小:1kb | 下载:0
[VHDL编程] eepromFINALcorto
说明:Basically it waits for a interrupt (push button) and checks if an eeprom 24c64 has FF in all its address then turns a led if true, this is only if the switch in port D is closed, if not, it writes a byte number "i" in th<Maus> 在 2024-11-19 上传 | 大小:1kb | 下载:0
[VHDL编程] baseband_modulation_coef_gain
说明:CPM调制定点增益模块,完成CPM的调制指数确定-Phase locked loop demodulation module, for CPM modulation demodulation front end<法克尤> 在 2024-11-19 上传 | 大小:1kb | 下载:0
[VHDL编程] Controll
说明:采用verilog实现控制整个解码项目的控制程序 -the Control program of Decode<huangqiunan> 在 2024-11-19 上传 | 大小:1kb | 下载:0
[VHDL编程] async_transmitter
说明:RS232的FPGA code,利用Verilog實現傳輸的部分。<AA> 在 2024-11-19 上传 | 大小:1kb | 下载:0