资源列表

« 1 2 ... .20 .21 .22 .23 .24 625.26 .27 .28 .29 .30 ... 4311 »

[VHDL编程oc8051.tar

说明:8051 core writen in VHDL, fully functional and tested
<eldis> 在 2025-01-28 上传 | 大小:1.44mb | 下载:0

[VHDL编程miniuart.tar

说明:Serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reason for developing the Serial UART core is the fact, that asynchronous serial communication
<eldis> 在 2025-01-28 上传 | 大小:6kb | 下载:0

[VHDL编程usb_phy.tar

说明:Very simple USB 1.1 PHY. Includes all the goodies: serial/parallel conversion, bit stuffing/unstuffing, NRZI encoding decoding. Uses a simplified UTMI interface. Currently doesn t do any error checking in the RX se
<eldis> 在 2025-01-28 上传 | 大小:7kb | 下载:0

[VHDL编程simple_spi.tar

说明:Enhanced version of the Serial Peripheral Interface available on Motorola s MC68HC11 family of CPUs.Enhancements include a wider supported operating frequency range, 4deep read and write fifos, and programmable transfer
<eldis> 在 2025-01-28 上传 | 大小:561kb | 下载:0

[VHDL编程mcpu_1.06b

说明:MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable
<eldis> 在 2025-01-28 上传 | 大小:243kb | 下载:0

[VHDL编程usart_verilog

说明:Uart verilog 代码 可综合 很好的代码-Uart verilog code
<shenhao> 在 2025-01-28 上传 | 大小:15kb | 下载:0

[VHDL编程stopwatch

说明:基于fpga的停表设计vudl编写,使用vhdl编写的.v文件。-the stopwatch based on fpga written with vhdl
<youngbing> 在 2025-01-28 上传 | 大小:1kb | 下载:0

[VHDL编程rd_wr_control

说明:USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
<Somasekhar> 在 2025-01-28 上传 | 大小:1kb | 下载:0

[VHDL编程tx_buff

说明:USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
<Somasekhar> 在 2025-01-28 上传 | 大小:1kb | 下载:0

[VHDL编程rec_buf

说明:USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
<Somasekhar> 在 2025-01-28 上传 | 大小:2kb | 下载:0

[VHDL编程usart

说明:USART coded in VHDL. It is writted in 5 files. I am uploading the files in order.
<Somasekhar> 在 2025-01-28 上传 | 大小:1kb | 下载:0

[VHDL编程HDB3

说明:hdb3的编解码实现,用c表述的 实际应用性不强,只为说明原理。-HDB3 codec realize, with the practical application of c expression is not strong, only to illustrate the principle.
<lixingjian> 在 2025-01-28 上传 | 大小:188kb | 下载:0
« 1 2 ... .20 .21 .22 .23 .24 625.26 .27 .28 .29 .30 ... 4311 »

源码中国 www.ymcn.org