说明:这是一款比较好的关于可编程逻辑器件的状态机源代码-This is a good comparison about programmable logic device of the state machine source code <jyb> 在 2025-04-08 上传
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说明:一种等精度的频率计,同时适合高频和低频,误差小。-A precision frequency meter, etc. At the same time, suitable high-frequency and low frequency, the error small. <邹国雄> 在 2025-04-08 上传
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说明:用VHDL语言讲述输出控制器(POC)的设计,这是大学课程的设计-VHDL language used on the output controller (POC) design, This is the design of university courses <黄小芳> 在 2025-04-08 上传
| 大小:33kb | 下载:0
说明:对输入时钟做除以8的分频和除以4的分频功能-Does the input clock frequency divided by 8 and divided by the number of sub-4 sub-frequency function <chujiang> 在 2025-04-08 上传
| 大小:115kb | 下载:0
说明:一种实现计算机接口rs232与FPGA通信的基于VHDL语言设计的一段非常简洁的程序-A RS232 computer interface implementation with FPGA-based VHDL language communications designed a very simple procedure <ouping> 在 2025-04-08 上传
| 大小:137kb | 下载:0
说明:This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x <Bill Guan> 在 2025-04-08 上传
| 大小:3.26mb | 下载:0