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[VHDL编程my_fifo_vhdl

说明:XILINX的FPGA实现的双口ram源码,可作为dsp\SDRAM和pci桥接作用,可直接使用,实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
<朱效志> 在 2024-11-15 上传 | 大小:19kb | 下载:0

[VHDL编程clock24

说明:
<liujl> 在 2024-11-15 上传 | 大小:346kb | 下载:0

[VHDL编程fir2

说明:Verilog 编写的fir滤波器,可以实现fir滤波器的功能-Verilog prepared by the fir filter can achieve fir filter function
<宋南> 在 2024-11-15 上传 | 大小:12kb | 下载:0

[VHDL编程sin_gen

说明:弦波產生+七段顯示器顯示目前該弦波點之數值-have grounded in paragraph 107 of the display shows the current Numerical grounded point
<Jyun-Hong Lin> 在 2024-11-15 上传 | 大小:411kb | 下载:0

[VHDL编程LED_clock_quartus

说明:用VHDL语言实现数显时钟,devid200.vhd为分频模块,scan.vhd为LED扫描模块,timecount.vhd为计数模块-VHDL digital clock, devid200.vhd for frequency module, scan.vhd for LED scanning module, timecount.vhd for counting module
<王龙> 在 2024-11-15 上传 | 大小:3kb | 下载:0

[VHDL编程imageEnhancement_VHDL

说明:VHDL 实现的图像增强,利用对比度增强的方法,实用-VHDL of image enhancement, use of contrast enhancement methods, practical
<严刚> 在 2024-11-15 上传 | 大小:113kb | 下载:0

[VHDL编程FPGA-based_oscilloscope

说明:FPGA-based_oscilloscope,VHDL写的实现 示波器的程序,及完整的工程描述文档-FPGA-based_oscilloscope. VHDL was oscilloscope to achieve the realization of the process, and complete the project descr iption document
<严刚> 在 2024-11-15 上传 | 大小:223kb | 下载:0

[VHDL编程fpgalcddriver

说明:基于FPGA液晶控制器设计与实现,采用VHDL硬件描述语言。-FPGA-based LCD controller design and implementation using VHDL hardware descr iption language.
<张杰> 在 2024-11-15 上传 | 大小:90kb | 下载:0

[VHDL编程Sobel--Image_Filter_An_Image_filtering_VHDL

说明:Sobel--Image Filter (I). An Image filtering is made over data loaded into the on board RAM and presented on a VGA monitor.zip-Sobel-- Image Filter (I). An Image filteri Vi is made over the data loaded into RAM on board a
<严刚> 在 2024-11-15 上传 | 大小:309kb | 下载:0

[VHDL编程Image_Filter_An_Image_halftone

说明:Image_Filter_An_Image_halftone is performed over data loaded into the on board RAM and presented on a VGA monitor-Image_Filter_An_Image_halftone is perf ormed over data loaded into the on board RAM and p resented on a VG
<严刚> 在 2024-11-15 上传 | 大小:805kb | 下载:0

[VHDL编程Medical_Image_processor

说明:Medical_Image_processor in VHDL。-Medical_Image_processor in VHDL.
<严刚> 在 2024-11-15 上传 | 大小:909kb | 下载:0

[VHDL编程yibuchuanxingtongxinshili

说明:异步通信串行口设计实例 做异步串行通信的可以用来参考一下-asynchronous serial communication design examples do asynchronous serial communications can be used to refer to
<sunny_girl> 在 2024-11-15 上传 | 大小:223kb | 下载:0
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