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[微处理器(ARM/PowerPC等)serial_xx_x

说明:这是一个用c写的串口测试的程序,可以很好的帮助你调试你的串口-This is a serial port using c written test procedures, you can very well help you debug your serial port
<huansuchanzhe> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[单片机(51,AVR,MSP430等)ADC

说明:单片机AD转换程序,适用于MC9s08AW60,-Single-chip AD conversion process, applicable to MC9s08AW60,
<曹震> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[VHDL编程halfband

说明:verilog写的39阶通带为20KHz的半带fir滤波器,经测试正确。-verilog halfband FIR
<lv> 在 2025-01-31 上传 | 大小:1kb | 下载:2

[VHDL编程cross_street_lights

说明:Cross street lights driver in VHDL. It have been tested on XILINX 9500.
<Gooreck> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[VHDL编程word

说明:Code was successfully implemented within ALtera FPGA with Quartus 6.0. It presents two polish own female names: ULA and ALA whose are scrolling on the 4-columns crystal LED. When you press the switch it will turn from UL
<Gooreck> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[VHDL编程ring

说明:Ring register[1 from 8] which seven speeds. The result is presented on 8 LEDs. After every cycle, speed grows. The process starts again after last 8 cycle.
<Gooreck> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[VHDL编程counter

说明:Decimal counter which is counting from 256 to 0. After that there will appear logic "1" in out. You can stop counting by pressing sequence. I called it detonation clock :]
<Gooreck> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[VHDL编程lift

说明:VHDL driver of lift in building. Result is presents on LED segments[decimal value].
<Gooreck> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[Windows CEIPsettingsandbacklight

说明:wince设置IP和背光样例代码,wince4.2,evc4.2编译,执行通过。-IP settings and backlight wince sample code, wince4.2, evc4.2 compiler, implementation through.
<xujg> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[嵌入式/单片机编程geryandbin

说明:在fpga中实现的格雷码与二进制的相互转换-In the FPGA implementation of the Gray code and binary conversion
<王石子> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[嵌入式/单片机编程divp5

说明:fpga上实现的最小是0.5分频的任意分频器-FPGA to achieve the minimum 0.5 hours are arbitrary frequency divider
<王石子> 在 2025-01-31 上传 | 大小:1kb | 下载:0

[嵌入式/单片机编程banlance

说明:fpga上实现的动平衡检测模块,只需要一编码器就可以-FPGA implementation of dynamic balance on the Detect module, required only one encoder can be
<王石子> 在 2025-01-31 上传 | 大小:1kb | 下载:0

源码中国 www.ymcn.org