搜索资源列表
verilog
- 采用用verilog语言编写的全数字锁相环的源代码。-Verilog language used by all-digital phase-locked loop' s source code.
zhiliudianji
- 直流电动机闭环系统调速数字控制系统的设计 -DC motor speed closed-loop system the design of digital control system
zhiliudianjishuzikongzhixitong
- 直流电机闭环调速数字控制系统设计,采用八位开关SKAIGUANG1000的8个拨动开关(K1-K7)控制直流电机的速度等级SCI发送数据控制电机正反转，发送00表示正转，发送01表示反转,当速度超过500r/min时，DSP向上位机发送速度值-Closed-loop DC motor speed digital control system design, using eight switches SKAIGUANG1000 of 8
pll
- 一個基本的鎖相迴路設計(PLL)simulink 程序-A basic phase-locked loop design (PLL) simulink program
costas_loop
- costas环载波同步与解调，其中有环路滤波器系数估算-costas loop carrier synchronization and demodulation, including the loop filter coefficients estimation
si4133-datasheet
- 该Si4133是一个单片集成电路，既执行IF和双频 RF合成为无线通信应用。在Si4133 包括三个和VCO，环路滤波器，参考和VCO分频器，相位 探测器。除法和可编程掉电设置与threewire 串行接口。-The Si4133 is a monolithic integrated circuit, both the implementation of the IF and dual-band
PLL_1
- Block model of a phase locked loop implemented in Simulink. Step 1 of a series of 5 developed models.
PLL2
- Block model of a phase locked loop implemented in Simulink. Step 2 of a series of 5 developed models.
PLL3
- Block model of a phase locked loop implemented in Simulink. Step 3 of a series of 5 developed models.
time_model_PLL
- Block model of a phase locked loop implemented in Simulink. Step 4 of a series of 5 developed models.
time_model_PLL1
- Block model of a phase locked loop implemented in Simulink. Step 5 of a series of 5 developed models.
wtut_sc
- DCM includes a clock delay locked loop used to minimize clock skew for Spartan-3, Virtex-II, Virtex-II Pro, and Virtex-II Pro X devices. DCM synchronizes the clock signal at the feedback clock input (CLKFB) to the cl
costas
- Recovery phase with recursive Costas loop. Bpsk symbols to demodulate
BUCK_clsloop
- these excellent buck converter topology of closed loop which was built was built in simulink.
synchronization
- 利用matlab仿真实现载波的平方环载波同步,costas环载波同步和符号同步.-achieved quadratic loop carrier synchronization, costas loop synchronization and symbol synchronization within matlab
xPCTargetManual
- xPC Target 工具箱使你可以在 Simulink 的框图中加入 I/O 方块图，并用 RTW 产生代码，最后下载到另一个运行 xPC Target 实时内核的 PC 机上。对于控制和 DSP 系统来说 xPC Target 是理想的快速原型和硬件在回路测试工具，它可以使你在一台标准的 PC 机上运行实时模型。如果附加 xPC Target 嵌入模块选项，你可以把你的实时嵌入式系统放入到一台微机上，应用于生产、数据采集、标定和测试
Matlab
- 介绍了MATLAB下控制无刷直流电机 采用闭环控制 各模块讲解比较详细-MATLAB introduced under the control of brushless DC motor closed-loop control of each module to explain in more detail
CarrieRecoveryUsingaSecondOrderCostasLoop
- Carrier Recovery Using a Second Order Costas Loop
msp430f149dpj
- 利用MSPd30F149 单片机和AIM21电流环芯片，通过简单的压频转换(多谐振荡器)电路实现了基于电客式差压 传感器的智能差压变送器设计。该设计的特点是利用压频转换电路取代了A／D模块，以极低的产品价格达到了较高的 系统测量精度。采用软件与硬件相结合的信号处理技术，实现了基于HART协议现场总线技术的差压模拟量的测量，通 过进一步采用CPLD器件的量化延时测频技术，将可以达到比传统A／D器件更高的压力测量精度。智能差压变
synchronization
- 采用AFC技术来锁定频，采用Garden技术进行定时恢复，采用Costas环进行相位的锁定-Use technology to lock the frequency of AFC, using Garden timing recovery techniques using Costas loop for phase locking