搜索资源列表
my_fifo_vhdl
- XILINX的FPGA实现的双口ram源码，可作为dsp\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
jsjktbg1_mydown0315
- xilinx ddr controler
ClockDiv
- 本程序以XILINX公司的ISE８.２为开发平台，采用VHDL为开发语言，实现了对一个时钟信号分频的功能-the procedures to XILINX ISE8.2 for the development platform VHDL used for the development of language, the right to achieve a clock frequency of the signal function
decoder24
- 本程序以XILINX公司的ISE８.２为开发平台，采用VHDL为开发语言，实现了一个简单的译码器，适合处学者-the procedures to XILINX ISE8.2 for the development platform VHDL language for the development and achieve a simple decoder, the Department for scholars
xst3_video
- 基于XILINX的XC3系列FPGA的VGA控制器的VHDL源程序。-based on the XC3 XILINX FPGA series VGA controller VHDL source.
XilinxISE
- XILINX开发环境ISE的入门操作指导，对于FPGA的初学者有较大的帮助。-XILINX ISE development environment operating guidance for beginners, For FPGA beginners have more help.
seven_seg
- 一个verilog代码，该代码很适合初学者熟悉FPGA的开发流程，主要功能为实现七段代码管的显示，主要针对xilinx公司spartan3系列的FPGA-a verilog code that are very suitable for beginners FPGA familiar with the development process, main function of the realization of the code in
protelxilinx
- Protel原理图需要的Xilinx元件库-Protel diagram components needed for Xilinx
Frequence_Generator
- xilinx提供的频率发生器的VHDL源码，可以运行在spartan3的学习开发板上。-xilinx the frequency generator VHDL source code, spartan3 can run in the learning development board.
Modelsim_timing_simulation_library
- 文章论述如何将向modelsim中添加仿真库，包括添加xilinx,altera,actel公司的仿真库的方法-Article on how to add ModelSim simulation library, including the add xilinx, altera, actel the company
Xinlinx_ISE_study
- 用中文介绍Xilinx公司FPGA/CPLD的集成开发环境－ISE软件的简单使用 -Introduction to Chinese Xilinx Inc. FPGA/CPLD integrated development environment-ISE software simple to use
Xilinx_Downloader
- FPGA-Xilinx 官方下载线，英文。入门必备！-FPGA-Xilinx Download the official line, in English. Entry required!
Xilinxopensourcecode
- xilinx公司的开放的源码，很有参考价值，其中有ddl，fifo控制等。-xilinx?? ?? ??? ?? ????? ? вο ????? ? ? ?ddl?? fifo? ? ? ??
usb_xilinx_vhdl
- usb源码_xilinx_vhdl 这是Xilinx FPGA上的usb源码（VHDL)-usb-source _xilinx_vhdl This is a Xilinx FPGA on the usb source code (VHDL)
FPGA_Flow
- fpga design flow from Xilinx
opb_ps2_dual_ref_v1_00_a
- 基于Xilinx FPGA实现PS2键盘鼠标接口。版本1.0-Based on Xilinx FPGA realize PS2 keyboard and mouse interface. Version 1.0
xilinx_media
- 关于xilinx学习指导，讲述语法和结构设计-Xilinx guidance on learning about grammar and structural design
test_flash
- xilinx fpga x3s500e芯片从flashboot的程序代码，一个是命令流编写，一个是往flash里写入启动代码。-xilinx fpga x3s500e chip flashboot program code from a command stream is prepared, one is to write boot code in flash.
ise
- xilinx的时序约束实验，通过阅读本文档，你可以用全局时序约束来轻松提高已有的项目的系统时钟频率，同时你还可以用映射后静态时序报告以及布局布线后静态时序报告来分析你的设计性能-Xilinx timing constraints of the experiment, by reading this document, you can use the overall timing constraints to easily enhance