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8051的内核(vhdl)
- 最完整最实用的8051的软核，用VHDL语言编写全部原代码，并有详细的注释介绍，对开发增强型多功能单片机或RSIC单片机内核和单片机SOC应用非常有参考价值-most complete most practical of the 8051 soft-core, with all the preparation VHDL source code, and the Notes for a detailed briefing on the d
i2c_cores
- IIC总线协议，VHDL语言编写，可以直接使用-IIC bus protocol, VHDL language can be used directly
三人表决器（三种不同的描述方式）
- 用VHDL语言编写的三人表决器，多数服从少数，或者一致通过。-VHDL prepared by the three voting machines, most of the views of the minority, or adopted unanimously.
可编程逻辑系统的VHDL设计技术_0
- 可编程逻辑系统的VHDL设计技术,该本书首先对VHDL语言进行了阐述,然后用alter公司的产品进行举例!-programmable logic system VHDL design technology, the first book of VHDL expounded, and then alter the company's products, for example!
100个vhdl设计例子
- 内附多路选择器，74系列芯片VHDL源码，加法器，FIR，比较器等大量例子，对初学VHDL语言很有好处。可用maxplus，quartus，synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL v
一个VHDL实现的测频计
- 一个vhdl实现的测频计,开发环境为任何支持vhdl语言的厂商提供的开发环境 -VHDL achieve a frequency measurement of dollars, development environment for any VHDL language support for manufacturers of the development environment
8倍频vhdl
- 该文件可用vhdl语言实现时钟8倍频，运行环境可在maxplus2和ise的仿真软件上-the document available VHDL Language 8 clock frequency, the operating environment and ideally maxplus2 simulation software
vhdl平方根
- 计算某数的平方根，VHDL语言，使用简单-calculate the square root of a number, VHDL, use simple
VHDL硬件描述语言基础
- 此课程讲义很有用,主要介绍了VHDL硬件描述语言,适合于初学者-course lectures very useful, mainly introduces the VHDL hardware descr iption language, suitable for beginners
[eda]vhdl
- 福州大学EDA选修课所有实验课程代码。VHDL语言描述（vhd），以及电路图（gdf）-Fuzhou University EDA optional courses in all experimental code. VHDL descr iption (vhd), and circuit (GdF)
ccmulVHDL
- vhdl语言编写的复数乘法运算器原代码，采用定点运算，并将复数乘法转为实数运算。-VHDL language in the plural multiplication with the original code using fixed-point computation. will the plural multiplication to real operations.
i2c_code(vhdl)
- i2c源码vhdl语言编写，传上与大家分享，请多指教-i2c source VHDL language, communicating with everyone sharing, please enlighten
VHDL-Clock
- 用VHDL语言写的时钟程序。采用模块化编程。可在EPM7128芯片上下载。编译环境可用Maxplus或Quartus。-write VHDL clock procedures. Modular programming. The EPM7128 chips download. Build environment or Quartus Maxplus available.
VHDL-FPGA-clock
- ＦＰＧＡ数字钟的设计，用VHDL语言编程，max+plus仿真，可在实际电路中验证-FPGA design, VHDL programming, max plus simulation, in the actual circuit verification
HXRJTD
- 这是本人在Max plus2环境下用VHDL语言编的交通灯控制程序。做EDA课程设计的朋友可以下来参考参考。-This is my Max plus2 environment with VHDL addendum to the traffic lights control procedures. EDA design courses so friends from the reference reference.
VHDL-six
- 用VHDL语言实现六分频，并且已经通过编译和仿真。由此可举一反三，实现任意偶数次分频。-VHDL six minutes frequency, and has been through translation, and simulation. From this we can draw a number at random dual frequency.
te3560
- 基于VHDL语言的实用电梯控制器的设计 -based on VHDL practical elevator controller design based on VHDL practical Elevator Controller VHDL design based on the practical design of the elevator controller based on VHDL practical elevator co
DS18B20+VHDL
- 用VHDL语言实现的控制DS18B20构成测温仪表的程序，包含了全部代码，可显示最高精度-with VHDL control DS18B20 constitute Thermometer procedures, contains all the code will show that the most high-precision
ref-sdr-sdram-vhdl
- FPGA连接SDRAM的源程序，VHDL语言实现，功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
VHDL
- 本系统使用VHDL语言进行设计，采用自上向下的设计方法。目标器件选用Xilinx公司的FPGA器件，并利用Xilinx ISE 7.1 进行VHDL程序的编译与综合，然后用Modelsim Xilinx Edition 6.1进行功能仿真和时序仿真。-The system design using VHDL language, using top-down design method. Selection of the target d