文件名称:syn_rd_wr_fifo

  • 所属分类:
  • 书籍源码
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2015-05-02
  • 文件大小:
  • 4.21mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • MR.***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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该代码实现了FPGA对USB芯片68013的读写,语言是VERLOD,试验通过。-The code to achieve the FPGA read and write 68013 on the USB chip, the language is VERLOD, through the test.


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syn_rd_wr_fifo

..............\GOOSESend1.data

..............\GOOSESend1.data.bak

..............\PLLJ_PLLSPE_INFO.txt

..............\Waveform.vwf

..............\cmp_state.ini

..............\db

..............\..\altsyncram_1604.tdf

..............\..\altsyncram_2604.tdf

..............\..\altsyncram_3604.tdf

..............\..\altsyncram_4604.tdf

..............\..\altsyncram_5604.tdf

..............\..\altsyncram_6604.tdf

..............\..\altsyncram_6ei1.tdf

..............\..\altsyncram_7604.tdf

..............\..\altsyncram_9304.tdf

..............\..\altsyncram_j604.tdf

..............\..\cmpr_efc.tdf

..............\..\cmpr_hfc.tdf

..............\..\cmpr_ifc.tdf

..............\..\cmpr_jfc.tdf

..............\..\cntr_4fi.tdf

..............\..\cntr_5fi.tdf

..............\..\cntr_6fi.tdf

..............\..\cntr_7fi.tdf

..............\..\cntr_8fi.tdf

..............\..\cntr_95j.tdf

..............\..\cntr_9fi.tdf

..............\..\cntr_a18.tdf

..............\..\cntr_afi.tdf

..............\..\cntr_bfi.tdf

..............\..\cntr_efi.tdf

..............\..\cntr_mdi.tdf

..............\..\cntr_p1j.tdf

..............\..\decode_4uf.tdf

..............\..\logic_util_heursitic.dat

..............\..\mux_jrc.tdf

..............\..\pll_altpll.v

..............\..\prev_cmp_rd_wr_fifo.qmsg

..............\..\rd_wr_fifo.amm.cdb

..............\..\rd_wr_fifo.asm.qmsg

..............\..\rd_wr_fifo.asm.rdb

..............\..\rd_wr_fifo.asm_labs.ddb

..............\..\rd_wr_fifo.cbx.xml

..............\..\rd_wr_fifo.cmp.cdb

..............\..\rd_wr_fifo.cmp.hdb

..............\..\rd_wr_fifo.cmp.kpt

..............\..\rd_wr_fifo.cmp.logdb

..............\..\rd_wr_fifo.cmp.rdb

..............\..\rd_wr_fifo.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd

..............\..\rd_wr_fifo.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd

..............\..\rd_wr_fifo.db_info

..............\..\rd_wr_fifo.fit.qmsg

..............\..\rd_wr_fifo.hier_info

..............\..\rd_wr_fifo.hif

..............\..\rd_wr_fifo.idb.cdb

..............\..\rd_wr_fifo.lpc.html

..............\..\rd_wr_fifo.lpc.rdb

..............\..\rd_wr_fifo.lpc.txt

..............\..\rd_wr_fifo.map.cdb

..............\..\rd_wr_fifo.map.hdb

..............\..\rd_wr_fifo.map.logdb

..............\..\rd_wr_fifo.map.qmsg

..............\..\rd_wr_fifo.pre_map.cdb

..............\..\rd_wr_fifo.pre_map.hdb

..............\..\rd_wr_fifo.rtlv.hdb

..............\..\rd_wr_fifo.rtlv_sg.cdb

..............\..\rd_wr_fifo.rtlv_sg_swap.cdb

..............\..\rd_wr_fifo.sgdiff.cdb

..............\..\rd_wr_fifo.sgdiff.hdb

..............\..\rd_wr_fifo.sim.vwf

..............\..\rd_wr_fifo.sld_design_entry.sci

..............\..\rd_wr_fifo.sld_design_entry_dsc.sci

..............\..\rd_wr_fifo.smart_action.txt

..............\..\rd_wr_fifo.smp_dump.txt

..............\..\rd_wr_fifo.sta.qmsg

..............\..\rd_wr_fifo.sta.rdb

..............\..\rd_wr_fifo.sta_cmp.8_slow_1200mv_85c.tdb

..............\..\rd_wr_fifo.syn_hier_info

..............\..\rd_wr_fifo.tis_db_list.ddb

..............\..\rd_wr_fifo.tiscmp.fast_1200mv_0c.ddb

..............\..\rd_wr_fifo.tiscmp.fastest_slow_1200mv_0c.ddb

..............\..\rd_wr_fifo.tiscmp.fastest_slow_1200mv_85c.ddb

..............\..\rd_wr_fifo.tiscmp.slow_1200mv_0c.ddb

..............\..\rd_wr_fifo.tiscmp.slow_1200mv_85c.ddb

..............\..\rd_wr_fifo.tmw_info

..............\..\rd_wr_fifo_cmp.qrpt

..............\greybox_tmp

..............\...........\cbx_args.txt

..............\incremental_db

..............\..............\README

..............\..............\compiled_partitions

..............\..............\...................\rd_wr_fifo.db_info

..............\..............\...................\rd_wr_fifo.root_partition.map.kpt

..............\pll.bsf

..............\pll.cmp

..............\pll.inc

..............\pll.ppf

..............\pll.qip

..............\pll.v

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