文件名称:68013
- 所属分类：
- 其他嵌入式/单片机内容
- 资源属性：
- [Windows] [Visual C] [源码]
- 上传时间：
- 2014-04-27
- 文件大小：
- 2.8mb
- 下载次数：
- 0次
- 提 供 者：
- 王
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
68013芯片的驱动程序，固件程序，以及上位机程序源代码-68013 chip drivers, firmware, and PC program source code
(系统自动生成,下载前可以参看下载内容)
下载文件列表
68013 slave fifo说明文档.doc
写FIFO
......\写FIFO
......\......\Apptest
......\......\.......\ezusbsys.h
......\......\.......\ReadMe.txt
......\......\.......\Release
......\......\.......\.......\StdAfx.obj
......\......\.......\.......\Test.exe
......\......\.......\.......\Test.obj
......\......\.......\.......\Test.res
......\......\.......\.......\TestDlg.obj
......\......\.......\res
......\......\.......\Resource.h
......\......\.......\res\cursor1.cur
......\......\.......\...\icon5.ico
......\......\.......\...\Test.ico
......\......\.......\...\Test.rc2
......\......\.......\...\usb.ico
......\......\.......\StdAfx.cpp
......\......\.......\StdAfx.h
......\......\.......\Test.aps
......\......\.......\Test.clw
......\......\.......\Test.cpp
......\......\.......\Test.dsp
......\......\.......\Test.dsw
......\......\.......\Test.h
......\......\.......\Test.ncb
......\......\.......\Test.opt
......\......\.......\Test.plg
......\......\.......\Test.rc
......\......\.......\TestDlg.cpp
......\......\.......\TestDlg.h
......\......\Sin wave_data.xls
......\......\wr_fifo
......\......\wr_fifo - 副本
......\......\..............\cmp_state.ini
......\......\..............\cos_data.mif
......\......\..............\db
......\......\..............\..\cntr_l18.tdf
......\......\..............\..\cntr_n28.tdf
......\......\..............\..\logic_util_heursitic.dat
......\......\..............\..\prev_cmp_wr_fifo.asm.qmsg
......\......\..............\..\prev_cmp_wr_fifo.fit.qmsg
......\......\..............\..\prev_cmp_wr_fifo.map.qmsg
......\......\..............\..\prev_cmp_wr_fifo.qmsg
......\......\..............\..\prev_cmp_wr_fifo.tan.qmsg
......\......\..............\..\wr_fifo.cbx.xml
......\......\..............\..\wr_fifo.cmp.rdb
......\......\..............\..\wr_fifo.db_info
......\......\..............\..\wr_fifo.eco.cdb
......\......\..............\..\wr_fifo.hier_info
......\......\..............\..\wr_fifo.hif
......\......\..............\..\wr_fifo.lpc.html
......\......\..............\..\wr_fifo.lpc.rdb
......\......\..............\..\wr_fifo.lpc.txt
......\......\..............\..\wr_fifo.map.cdb
......\......\..............\..\wr_fifo.map.hdb
......\......\..............\..\wr_fifo.map.logdb
......\......\..............\..\wr_fifo.map.qmsg
......\......\..............\..\wr_fifo.pre_map.cdb
......\......\..............\..\wr_fifo.pre_map.hdb
......\......\..............\..\wr_fifo.rtlv.hdb
......\......\..............\..\wr_fifo.rtlv_sg.cdb
......\......\..............\..\wr_fifo.rtlv_sg_swap.cdb
......\......\..............\..\wr_fifo.sgdiff.cdb
......\......\..............\..\wr_fifo.sgdiff.hdb
......\......\..............\..\wr_fifo.sld_design_entry.sci
......\......\..............\..\wr_fifo.sld_design_entry_dsc.sci
......\......\..............\..\wr_fifo.smart_action.txt
......\......\..............\..\wr_fifo.smp_dump.txt
......\......\..............\..\wr_fifo.syn_hier_info
......\......\..............\..\wr_fifo.tis_db_list.ddb
......\......\..............\..\wr_fifo_cmp.qrpt
......\......\..............\incremental_db
......\......\..............\..............\compiled_partitions
......\......\..............\..............\...................\wr_fifo.root_partition.map.kpt
......\......\..............\..............\README
......\......\..............\Reset_Delay.v
......\......\..............\rom.qip
......\......\..............\rom.v
......\......\..............\rom_bb.v
......\......\..............\rom_syn.v
......\......\..............\transcript
......\......\..............\vish_stacktrace.vstf
......\......\..............\vsim.wlf
......\......\..............\work
......\......\..............\....\wr_fifo
......\......\..............\....\.......\verilog.asm
......\......\..............\....\.......\_primary.dat
......\......\..............\....\.......\_primary.vhd
......\......\..............\....\wr_fifo_tb
......\......\..............\....\..........\verilog.asm
......\......\..............\....\..........\_primary.dat
......\......\..............\....\..........\_primary.vhd