文件名称:zhiliqiangdaqi
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智力抢答器设计
（1）可容纳4组参赛者的数字智力抢答器，每组设置一个抢答按键；
（2）电路具有一第一抢答信号的鉴别和锁存的功能。在主持人将系统复位并发出抢答指令后，若参加者按抢答键，则该组指示灯亮并用组别显示抢答者的组别。此时，电路具有自锁功能，使别组的抢答开关不起作用。
设置计分电路。每组在开始时预置成100分，抢答后主持人计分，答对一次加10分。
设置犯规电路。对提前抢答者和超时抢答级别鸣喇叭示警，并由级别显示电路显示出犯规的组别。
其他要求：
（1）晶振为12 MHz
（2）采用CPLD 器件，为ALTERA 的EPM7064SL-44
（3）采用数码管显示-Intellectual Responder design (1) can accommodate up to four groups of digital intelligence Responder contestants, each set a Responder button (2) circuit has a first answer signal identification and latch functions. The moderator will answer in a system reset and issue directives, if the participant press answer key, and use the group indicator light displays Responder' s constituency groups. At this point, the circuit has a self-locking function, so do not answer in the group switch does not work. Set scoring circuits. At the beginning of each preset to 100 points, after the moderator scoring answer, answer time plus 10 minutes. Set foul circuits. Right answer in advance and the honking warning timeout Responder level by level display circuit shows foul groups. Other requirements: (a) crystal is 12 MHz (2) using CPLD devices for the ALTERA EPM7064SL-44 (3) using the digital display
（1）可容纳4组参赛者的数字智力抢答器，每组设置一个抢答按键；
（2）电路具有一第一抢答信号的鉴别和锁存的功能。在主持人将系统复位并发出抢答指令后，若参加者按抢答键，则该组指示灯亮并用组别显示抢答者的组别。此时，电路具有自锁功能，使别组的抢答开关不起作用。
设置计分电路。每组在开始时预置成100分，抢答后主持人计分，答对一次加10分。
设置犯规电路。对提前抢答者和超时抢答级别鸣喇叭示警，并由级别显示电路显示出犯规的组别。
其他要求：
（1）晶振为12 MHz
（2）采用CPLD 器件，为ALTERA 的EPM7064SL-44
（3）采用数码管显示-Intellectual Responder design (1) can accommodate up to four groups of digital intelligence Responder contestants, each set a Responder button (2) circuit has a first answer signal identification and latch functions. The moderator will answer in a system reset and issue directives, if the participant press answer key, and use the group indicator light displays Responder' s constituency groups. At this point, the circuit has a self-locking function, so do not answer in the group switch does not work. Set scoring circuits. At the beginning of each preset to 100 points, after the moderator scoring answer, answer time plus 10 minutes. Set foul circuits. Right answer in advance and the honking warning timeout Responder level by level display circuit shows foul groups. Other requirements: (a) crystal is 12 MHz (2) using CPLD devices for the ALTERA EPM7064SL-44 (3) using the digital display
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智能抢答器\焊接板程序\sel.v
..........\..........\int_div.v
..........\..........\scan_led.v
..........\焊接板程序
智能抢答器