文件名称:Example-b3-1
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每个工程示例都包括了该工程的项目文件、源文件、报告文件和生成结果等文件，读者可以用Quartus II或相应的软件直接打开。设计源文件根据设计输入类型分为源代码或原理图等。-Each project examples include the project files of the project, source files, report files and generate the results files, the reader can use Quartus II or the software to directly open the corresponding. Design source file type according to the design input into the source code or schematic diagram, etc.
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下载文件列表
Example-b3-1\uart_regs\core\myfifo_10.v
............\.........\....\myfifo_10_bb.v
............\.........\....\myfifo_10_wave0.jpg
............\.........\....\myfifo_10_waveforms.html
............\.........\....\myfifo_8.v
............\.........\....\myfifo_8_bb.v
............\.........\....\myfifo_8_wave0.jpg
............\.........\....\myfifo_8_waveforms.html
............\.........\dev\chip_editor.acv
............\.........\...\cmp_state.ini
............\.........\...\db\add_sub_1jh.tdf
............\.........\...\..\add_sub_dhh.tdf
............\.........\...\..\add_sub_ehh.tdf
............\.........\...\..\add_sub_fhh.tdf
............\.........\...\..\add_sub_ihh.tdf
............\.........\...\..\add_sub_rih.tdf
............\.........\...\..\altsyncram_4pl1.tdf
............\.........\...\..\altsyncram_apb1.tdf
............\.........\...\..\altsyncram_gml1.tdf
............\.........\...\..\altsyncram_mmb1.tdf
............\.........\...\..\a_dpfifo_4nl.tdf
............\.........\...\..\a_dpfifo_lh81.tdf
............\.........\...\..\a_dpfifo_rll.tdf
............\.........\...\..\a_dpfifo_ui81.tdf
............\.........\...\..\a_fefifo_66f.tdf
............\.........\...\..\a_fefifo_qve.tdf
............\.........\...\..\cntr_9d7.tdf
............\.........\...\..\cntr_tcb.tdf
............\.........\...\..\dpram_2h51.tdf
............\.........\...\..\dpram_81k.tdf
............\.........\...\..\dpram_h2k.tdf
............\.........\...\..\dpram_pf51.tdf
............\.........\...\..\scfifo_eaq.tdf
............\.........\...\..\scfifo_eb81.tdf
............\.........\...\..\scfifo_nbq.tdf
............\.........\...\..\scfifo_nc81.tdf
............\.........\...\..\uart_regs-sim.vwf
............\.........\...\..\uart_regs.asm.qmsg
............\.........\...\..\uart_regs.cbx.xml
............\.........\...\..\uart_regs.cmp.cdb
............\.........\...\..\uart_regs.cmp.hdb
............\.........\...\..\uart_regs.cmp.logdb
............\.........\...\..\uart_regs.cmp.rdb
............\.........\...\..\uart_regs.cmp.tdb
............\.........\...\..\uart_regs.cmp0.ddb
............\.........\...\..\uart_regs.dbp
............\.........\...\..\uart_regs.db_info
............\.........\...\..\uart_regs.eco.cdb
............\.........\...\..\uart_regs.fit.qmsg
............\.........\...\..\uart_regs.hier_info
............\.........\...\..\uart_regs.hif
............\.........\...\..\uart_regs.map.cdb
............\.........\...\..\uart_regs.map.hdb
............\.........\...\..\uart_regs.map.logdb
............\.........\...\..\uart_regs.map.qmsg
............\.........\...\..\uart_regs.pre_map.cdb
............\.........\...\..\uart_regs.pre_map.hdb
............\.........\...\..\uart_regs.psp
............\.........\...\..\uart_regs.pss
............\.........\...\..\uart_regs.rtlv.hdb
............\.........\...\..\uart_regs.rtlv_sg.cdb
............\.........\...\..\uart_regs.rtlv_sg_swap.cdb
............\.........\...\..\uart_regs.sgdiff.cdb
............\.........\...\..\uart_regs.sgdiff.hdb
............\.........\...\..\uart_regs.signalprobe.cdb
............\.........\...\..\uart_regs.sld_design_entry.sci
............\.........\...\..\uart_regs.sld_design_entry_dsc.sci
............\.........\...\..\uart_regs.syn_hier_info
............\.........\...\..\uart_regs.tan.qmsg
............\.........\...\..\uart_regs_cmp.qrpt
............\.........\...\..\uart_regs_hier_info
............\.........\...\..\uart_regs_sim.qrpt
............\.........\...\..\uart_regs_syn_hier_info
............\.........\...\sim.cfg
............\.........\...\uart_regs.asm.rpt
............\.........\...\uart_regs.done
............\.........\...\uart_regs.fit.eqn
............\.........\...\uart_regs.fit.rpt
............\.........\...\uart_regs.fit.smsg
............\.........\...\uart_regs.fit.summary
............\.........\...\uart_regs.fld
............\.........\...\uart_regs.flow.rpt
............\.........\...\uart_regs.map.eqn
............\.........\...\uart_regs.map.rpt
............\.........\...\uart_regs.map.smsg
............\.........\...\uart_regs.map.summary
..........
............\.........\....\myfifo_10_bb.v
............\.........\....\myfifo_10_wave0.jpg
............\.........\....\myfifo_10_waveforms.html
............\.........\....\myfifo_8.v
............\.........\....\myfifo_8_bb.v
............\.........\....\myfifo_8_wave0.jpg
............\.........\....\myfifo_8_waveforms.html
............\.........\dev\chip_editor.acv
............\.........\...\cmp_state.ini
............\.........\...\db\add_sub_1jh.tdf
............\.........\...\..\add_sub_dhh.tdf
............\.........\...\..\add_sub_ehh.tdf
............\.........\...\..\add_sub_fhh.tdf
............\.........\...\..\add_sub_ihh.tdf
............\.........\...\..\add_sub_rih.tdf
............\.........\...\..\altsyncram_4pl1.tdf
............\.........\...\..\altsyncram_apb1.tdf
............\.........\...\..\altsyncram_gml1.tdf
............\.........\...\..\altsyncram_mmb1.tdf
............\.........\...\..\a_dpfifo_4nl.tdf
............\.........\...\..\a_dpfifo_lh81.tdf
............\.........\...\..\a_dpfifo_rll.tdf
............\.........\...\..\a_dpfifo_ui81.tdf
............\.........\...\..\a_fefifo_66f.tdf
............\.........\...\..\a_fefifo_qve.tdf
............\.........\...\..\cntr_9d7.tdf
............\.........\...\..\cntr_tcb.tdf
............\.........\...\..\dpram_2h51.tdf
............\.........\...\..\dpram_81k.tdf
............\.........\...\..\dpram_h2k.tdf
............\.........\...\..\dpram_pf51.tdf
............\.........\...\..\scfifo_eaq.tdf
............\.........\...\..\scfifo_eb81.tdf
............\.........\...\..\scfifo_nbq.tdf
............\.........\...\..\scfifo_nc81.tdf
............\.........\...\..\uart_regs-sim.vwf
............\.........\...\..\uart_regs.asm.qmsg
............\.........\...\..\uart_regs.cbx.xml
............\.........\...\..\uart_regs.cmp.cdb
............\.........\...\..\uart_regs.cmp.hdb
............\.........\...\..\uart_regs.cmp.logdb
............\.........\...\..\uart_regs.cmp.rdb
............\.........\...\..\uart_regs.cmp.tdb
............\.........\...\..\uart_regs.cmp0.ddb
............\.........\...\..\uart_regs.dbp
............\.........\...\..\uart_regs.db_info
............\.........\...\..\uart_regs.eco.cdb
............\.........\...\..\uart_regs.fit.qmsg
............\.........\...\..\uart_regs.hier_info
............\.........\...\..\uart_regs.hif
............\.........\...\..\uart_regs.map.cdb
............\.........\...\..\uart_regs.map.hdb
............\.........\...\..\uart_regs.map.logdb
............\.........\...\..\uart_regs.map.qmsg
............\.........\...\..\uart_regs.pre_map.cdb
............\.........\...\..\uart_regs.pre_map.hdb
............\.........\...\..\uart_regs.psp
............\.........\...\..\uart_regs.pss
............\.........\...\..\uart_regs.rtlv.hdb
............\.........\...\..\uart_regs.rtlv_sg.cdb
............\.........\...\..\uart_regs.rtlv_sg_swap.cdb
............\.........\...\..\uart_regs.sgdiff.cdb
............\.........\...\..\uart_regs.sgdiff.hdb
............\.........\...\..\uart_regs.signalprobe.cdb
............\.........\...\..\uart_regs.sld_design_entry.sci
............\.........\...\..\uart_regs.sld_design_entry_dsc.sci
............\.........\...\..\uart_regs.syn_hier_info
............\.........\...\..\uart_regs.tan.qmsg
............\.........\...\..\uart_regs_cmp.qrpt
............\.........\...\..\uart_regs_hier_info
............\.........\...\..\uart_regs_sim.qrpt
............\.........\...\..\uart_regs_syn_hier_info
............\.........\...\sim.cfg
............\.........\...\uart_regs.asm.rpt
............\.........\...\uart_regs.done
............\.........\...\uart_regs.fit.eqn
............\.........\...\uart_regs.fit.rpt
............\.........\...\uart_regs.fit.smsg
............\.........\...\uart_regs.fit.summary
............\.........\...\uart_regs.fld
............\.........\...\uart_regs.flow.rpt
............\.........\...\uart_regs.map.eqn
............\.........\...\uart_regs.map.rpt
............\.........\...\uart_regs.map.smsg
............\.........\...\uart_regs.map.summary
..........