文件名称:PS2Fpga

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 596kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 王*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

PS2开发源代码,取自于FPGA开发板,可直接应用于实际项目中-PS2 development of source code, derived from FPGA development board can be directly applied to actual projects
(系统自动生成,下载前可以参看下载内容)

下载文件列表

实战训练4 PS2接口控制

.....................\download

.....................\........\top.bit

.....................\........\top.mcs

.....................\project

.....................\.......\.untf

.....................\.......\ascii码表.txt

.....................\.......\automake.log

.....................\.......\bitgen.ut

.....................\.......\div16.cmd_log

.....................\.......\div16.lso

.....................\.......\div16.ngc

.....................\.......\div16.ngr

.....................\.......\div16.prj

.....................\.......\div16.spl

.....................\.......\div16.stx

.....................\.......\div16.sym

.....................\.......\div16.syr

.....................\.......\DIV16.v

.....................\.......\div16_summary.html

.....................\.......\div16_vhdl.prj

.....................\.......\div_256.spl

.....................\.......\div_256.sym

.....................\.......\div_256.v

.....................\.......\lcd.spl

.....................\.......\lcd.sym

.....................\.......\lcd.v

.....................\.......\project.dhp

.....................\.......\project.ise

.....................\.......\project.ise_ISE_Backup

.....................\.......\ps2_keyboard.v

.....................\.......\ps2_keyboard_interface.spl

.....................\.......\ps2_keyboard_interface.sym

.....................\.......\top.bgn

.....................\.......\top.bit

.....................\.......\top.bld

.....................\.......\top.cmd_log

.....................\.......\top.drc

.....................\.......\top.lfp

.....................\.......\top.lso

.....................\.......\top.mrp

.....................\.......\top.nc1

.....................\.......\top.ncd

.....................\.......\top.ngc

.....................\.......\top.ngd

.....................\.......\top.ngm

.....................\.......\top.ngr

.....................\.......\top.pad

.....................\.......\top.pad_txt

.....................\.......\top.par

.....................\.......\top.pcf

.....................\.......\top.placed_ncd_tracker

.....................\.......\top.prj

.....................\.......\top.routed_ncd_tracker

.....................\.......\top.sch

.....................\.......\top.stx

.....................\.......\top.synth_nlf

.....................\.......\top.syr

.....................\.......\top.twr

.....................\.......\top.twx

.....................\.......\top.ucf

.....................\.......\top.ucf.untf

.....................\.......\top.ut

.....................\.......\top.v

.....................\.......\top.versim_synth

.....................\.......\top.vf

.....................\.......\top.xpi

.....................\.......\top_last_par.ncd

.....................\.......\top_map.ncd

.....................\.......\top_map.ngm

.....................\.......\top_pad.csv

.....................\.......\top_pad.txt

.....................\.......\top_summary.html

.....................\.......\top_synthesis.nlf

.....................\.......\top_synthesis.v

.....................\.......\top_vhdl.prj

.....................\.......\transcript

.....................\.......\xst

.....................\.......\...\dump.xst

.....................\.......\...\........\div16.prj

.....................\.......\...\........\.........\ngx

.....................\.......\...\........\.........\...\notopt

.....................\.......\...\........\.........\...\opt

.....................\.......\...\........\top.prj

.....................\.......\...\........\.......\ngx

.....................\.......\...\........\.......\...\notopt

.....................\.......\...\........\.......\...\opt

.....................\.......\...\work

.....................\.......\...\....\hdllib.ref

.....................\.......\...\....\vlg1A

.....................\.......\...\....\.....\div16.bin

.....................\.......\...\....\vlg5B

.....................\.......\...\....\.....\div__256.bin

.....................\.......\...\....\vlg5F

.....................\.......\...\....\.....\lcd.bin

.....................\.......

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