文件名称:half_clk
介绍说明－－下载内容均来自于网络，请自行研究使用
输入一个时钟信号，输出时钟信号为输入时钟信号频率的二分之一-Enter a clock signal, the output clock signal for the input clock signal frequency of one-half
(系统自动生成,下载前可以参看下载内容)
下载文件列表
half_clk
........\.lso
........\half_clk.ise
........\half_clk.ise_ISE_Backup
........\half_clk.prj
........\half_clk.restore
........\half_clk.stx
........\half_clk.xst
........\half_clktest.v
........\half_clktest_v_beh.prj
........\half_clktest_v_isim_beh.exe
........\half_clktest_v_isim_beh.wfs
........\half_clktest_v_stx.prj
........\harf_clk.v
........\harf_clk_summary.html
........\isim
........\....\temp
........\....\....\hdllib.ref
........\....\....\hdpdeps.ref
........\....\....\vlg28
........\....\....\.....\half__clk.bin
........\....\....\vlg2D
........\....\....\.....\glbl.bin
........\....\....\vlg4D
........\....\....\.....\half__clktest__v.bin
........\....\work
........\....\....\glbl
........\....\....\....\glbl.h
........\....\....\....\mingw
........\....\....\....\.....\glbl.obj
........\....\....\half__clk
........\....\....\.........\half__clk.h
........\....\....\.........\mingw
........\....\....\.........\.....\half__clk.obj
........\....\....\half__clktest__v
........\....\....\................\half__clktest__v.h
........\....\....\................\mingw
........\....\....\................\.....\half__clktest__v.obj
........\....\....\................\xsimhalf__clktest__v.cpp
........\....\....\hdllib.ref
........\....\....\hdpdeps.ref
........\....\....\vlg28
........\....\....\.....\half__clk.bin
........\....\....\vlg2D
........\....\....\.....\glbl.bin
........\....\....\vlg4D
........\....\....\.....\half__clktest__v.bin
........\isim.cmd
........\isim.hdlsourcefiles
........\isim.log
........\isim.tmp_save
........\.............\_1
........\isimwavedata.xwv
........\simulate_dofile.log
........\xilinxsim.ini
........\xst
........\...\projnav.tmp
........\...\work
........\...\....\hdllib.ref
........\...\....\vlg28
........\...\....\.....\half__clk.bin
........\_xmsgs
........\......\fuse.xmsgs
........\......\xst.xmsgs
........\__ISE_repository_half_clk.ise_.lock
........\.lso
........\half_clk.ise
........\half_clk.ise_ISE_Backup
........\half_clk.prj
........\half_clk.restore
........\half_clk.stx
........\half_clk.xst
........\half_clktest.v
........\half_clktest_v_beh.prj
........\half_clktest_v_isim_beh.exe
........\half_clktest_v_isim_beh.wfs
........\half_clktest_v_stx.prj
........\harf_clk.v
........\harf_clk_summary.html
........\isim
........\....\temp
........\....\....\hdllib.ref
........\....\....\hdpdeps.ref
........\....\....\vlg28
........\....\....\.....\half__clk.bin
........\....\....\vlg2D
........\....\....\.....\glbl.bin
........\....\....\vlg4D
........\....\....\.....\half__clktest__v.bin
........\....\work
........\....\....\glbl
........\....\....\....\glbl.h
........\....\....\....\mingw
........\....\....\....\.....\glbl.obj
........\....\....\half__clk
........\....\....\.........\half__clk.h
........\....\....\.........\mingw
........\....\....\.........\.....\half__clk.obj
........\....\....\half__clktest__v
........\....\....\................\half__clktest__v.h
........\....\....\................\mingw
........\....\....\................\.....\half__clktest__v.obj
........\....\....\................\xsimhalf__clktest__v.cpp
........\....\....\hdllib.ref
........\....\....\hdpdeps.ref
........\....\....\vlg28
........\....\....\.....\half__clk.bin
........\....\....\vlg2D
........\....\....\.....\glbl.bin
........\....\....\vlg4D
........\....\....\.....\half__clktest__v.bin
........\isim.cmd
........\isim.hdlsourcefiles
........\isim.log
........\isim.tmp_save
........\.............\_1
........\isimwavedata.xwv
........\simulate_dofile.log
........\xilinxsim.ini
........\xst
........\...\projnav.tmp
........\...\work
........\...\....\hdllib.ref
........\...\....\vlg28
........\...\....\.....\half__clk.bin
........\_xmsgs
........\......\fuse.xmsgs
........\......\xst.xmsgs
........\__ISE_repository_half_clk.ise_.lock