文件名称:VLSIrtl_spi
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verilog语言写的SPI接口,全同步设计,低门数,可以很容易应用到嵌入设计方案中.-Verilog language to write the SPI interface, all synchronous design, low gate count. it is very easy to use embedded design programs.
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下载文件列表
压缩包 : 47651479vlsirtl_spi.zip 列表 rtl_spi/ rtl_spi/spi.v rtl_spi/spi_bitcounter.v rtl_spi/spi_bitcounter_rtl.v rtl_spi/spi_bytecounter.v rtl_spi/spi_bytecounter_rtl.v rtl_spi/spi_clkdiv_count.v rtl_spi/spi_clkdiv_count_rtl.v rtl_spi/spi_clock_gen.v rtl_spi/spi_comp3_ge.v rtl_spi/spi_comp3_ge_rtl.v rtl_spi/spi_comp3_se.v rtl_spi/spi_comp3_se_rtl.v rtl_spi/spi_control.v rtl_spi/spi_core.v rtl_spi/spi_cs_cnt.v rtl_spi/spi_cs_cnt_rtl.v rtl_spi/spi_equal3.v rtl_spi/spi_equal3_rtl.v rtl_spi/spi_fifo.v rtl_spi/spi_it.v rtl_spi/spi_map.v rtl_spi/spi_page_cnt.v rtl_spi/spi_page_cnt_rtl.v rtl_spi/spi_regs.v rtl_spi/spi_tx_rx.v rtl_spi/spi_waitcounter.v rtl_spi/spi_waitcounter_rtl.v