文件名称:简易电子琴
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用verilog语言编写的8键简易电子琴，并下载到FPGA通过仿真
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压缩包 : dianziqin.rar 列表 dianziqin/cmp_state.ini dianziqin/sim.cfg dianziqin/Speaker.vhd dianziqin/tone.vhd dianziqin/top.asm.rpt dianziqin/top.done dianziqin/top.fit.eqn dianziqin/top.fit.rpt dianziqin/top.fit.summary dianziqin/top.flow.rpt dianziqin/top.map.eqn dianziqin/top.map.rpt dianziqin/top.map.summary dianziqin/top.pin dianziqin/top.pof dianziqin/top.qpf dianziqin/top.qsf dianziqin/top.qws dianziqin/top.sim.rpt dianziqin/top.sof dianziqin/top.tan.rpt dianziqin/top.tan.summary dianziqin/top.vhd dianziqin/top.vwf dianziqin/top_assignment_defaults.qdf dianziqin/_desktop.ini dianziqin/db/altsyncram_dvk.tdf dianziqin/db/cntr_7t7.tdf dianziqin/db/cntr_ea7.tdf dianziqin/db/top.(0).cnf.cdb dianziqin/db/top.(0).cnf.hdb dianziqin/db/top.(1).cnf.cdb dianziqin/db/top.(1).cnf.hdb dianziqin/db/top.(2).cnf.cdb dianziqin/db/top.(2).cnf.hdb dianziqin/db/top.(3).cnf.cdb dianziqin/db/top.(3).cnf.hdb dianziqin/db/top.(4).cnf.cdb dianziqin/db/top.(4).cnf.hdb dianziqin/db/top.asm.qmsg dianziqin/db/top.cbx.xml dianziqin/db/top.cmp.cdb dianziqin/db/top.cmp.hdb dianziqin/db/top.cmp.rdb dianziqin/db/top.cmp.tdb dianziqin/db/top.cmp0.ddb dianziqin/db/top.dbp dianziqin/db/top.db_info dianziqin/db/top.eco.cdb dianziqin/db/top.fit.qmsg dianziqin/db/top.hier_info dianziqin/db/top.hif dianziqin/db/top.map.cdb dianziqin/db/top.map.hdb dianziqin/db/top.map.qmsg dianziqin/db/top.pre_map.cdb dianziqin/db/top.pre_map.hdb dianziqin/db/top.psp dianziqin/db/top.rtlv.hdb dianziqin/db/top.rtlv_sg.cdb dianziqin/db/top.rtlv_sg_swap.cdb dianziqin/db/top.sgdiff.cdb dianziqin/db/top.sgdiff.hdb dianziqin/db/top.signalprobe.cdb dianziqin/db/top.sld_design_entry.sci dianziqin/db/top.sld_design_entry_dsc.sci dianziqin/db/top.syn_hier_info dianziqin/db/top.tan.qmsg dianziqin/db/TOP0.rtl.mif dianziqin/db/_desktop.ini dianziqin/