文件名称:USBUARTIICVGAcode

  • 所属分类:
  • 其它资源
  • 资源属性:
  • [Windows] [Visual C] [源码]
  • 上传时间:
  • 2008-10-13
  • 文件大小:
  • 492.18kb
  • 下载次数:
  • 0次
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  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

verilog示例程序,很有实验和参考价值
(系统自动生成,下载前可以参看下载内容)

下载文件列表

压缩包 : 115157693usbuartiicvgacode.rar 列表
USB\Firmware\DeviceTranseiver.jhd
USB\Firmware\DeviceTranseiver.vhd
USB\Firmware\EdgeController.jhd
USB\Firmware\EdgeController.vhd
USB\Firmware\Firmware.npl
USB\Firmware\Firmware.ptf
USB\Firmware\FrequencyDivider.jhd
USB\Firmware\FrequencyDivider.vhd
USB\Firmware\IOSwitch.jhd
USB\Firmware\IOSwitch.vhd
USB\Firmware\PDIUSBD12_Package.vhd
USB\Firmware\RequestHandler.jhd
USB\Firmware\RequestHandler.vhd
USB\Firmware\USBSoftLock.jhd
USB\Firmware\USBSoftLock.vhd
USB\Firmware\USBSoftLock_ucf.ucf
USB\Firmware\USB_Package.vhd
USB\Firmware\__projnav.log
USB\Firmware\automake.log
USB\Firmware\usbsoftlock_TB.jhd
USB\Firmware\usbsoftlock_TB.vhd
USB\Firmware\__projnav\runXst_tcl.rsp
USB\Firmware\__projnav
USB\Firmware
USB\Driver\USBSoftLock.dsw
USB\Driver\USBSoftLock.inf
USB\Driver\USBSoftLock.opt
USB\Driver\USBSoftLock.sys
USB\Driver\USBSoftLockDeviceInterface.h
USB\Driver\USBSoftLockioctl.h
USB\Driver\dirs
USB\Driver\readme.txt
USB\Driver\sys\USBSoftLock.cpp
USB\Driver\sys\USBSoftLock.dsp
USB\Driver\sys\USBSoftLock.h
USB\Driver\sys\USBSoftLock.inf
USB\Driver\sys\USBSoftLock.plg
USB\Driver\sys\USBSoftLock.rc
USB\Driver\sys\USBSoftLock.stc
USB\Driver\sys\USBSoftLock.sys
USB\Driver\sys\USBSoftLockDevice.cpp
USB\Driver\sys\USBSoftLockDevice.h
USB\Driver\sys\function.h
USB\Driver\sys\makefile
USB\Driver\sys\resource.h
USB\Driver\sys\sources
USB\Driver\sys
USB\Driver\exe\OpenByIntf.cpp
USB\Driver\exe\Test_USBSoftLock.cpp
USB\Driver\exe\Test_USBSoftLock.dsp
USB\Driver\exe\Test_USBSoftLock.plg
USB\Driver\exe\Test_USBSoftLock.stc
USB\Driver\exe\makefile
USB\Driver\exe\sources
USB\Driver\exe\Debug
USB\Driver\exe
USB\Driver
USB\Application\Cube.aps
USB\Application\Cube.rc
USB\Application\InputDialog.cpp
USB\Application\InputDialog.h
USB\Application\SoftLock.cpp
USB\Application\SoftLock.h
USB\Application\cube.clw
USB\Application\cube.cpp
USB\Application\cube.dsp
USB\Application\cube.dsw
USB\Application\cube.exe
USB\Application\cube.h
USB\Application\cube.mak
USB\Application\cube.ncb
USB\Application\cube.opt
USB\Application\cube.plg
USB\Application\cubedoc.cpp
USB\Application\cubedoc.h
USB\Application\cubeview.cpp
USB\Application\cubeview.h
USB\Application\mainfrm.cpp
USB\Application\mainfrm.h
USB\Application\makefile
USB\Application\resource.h
USB\Application\stdafx.cpp
USB\Application\stdafx.h
USB\Application\res\cube.ico
USB\Application\res\cube.rc2
USB\Application\res\toolbar.bmp
USB\Application\res
USB\Application
USB
vga\__projnav.log
vga\automake.log
vga\coregen.log
vga\coregen.prj
vga\generic_dpram.v
vga\generic_spram.v
vga\prjname.lso
vga\sync_check.v
vga\test_bench_top.v
vga\test_bench_top.v.bak
vga\tests.v
vga\tests.v.bak
vga\timescale.v
vga\vga.dhp
vga\vga.npl
vga\vga_clkgen.v
vga\vga_colproc.v
vga\vga_csm_pb.v
vga\vga_cur_cregs.v
vga\vga_curproc.v
vga\vga_defines.v
vga\vga_defines.v.bak
vga\vga_enh_top.cmd_log
vga\vga_enh_top.lso
vga\vga_enh_top.prj
vga\vga_enh_top.stx
vga\vga_enh_top.syr
vga\vga_enh_top.v
vga\vga_enh_top_vhdl.prj
vga\vga_fifo.v
vga\vga_fifo_dc.v
vga\vga_pgen.v
vga\vga_tgen.v
vga\vga_vtim.v
vga\vga_wb_master.v
vga\vga_wb_master.v.bak
vga\vga_wb_slave.v
vga\vga_wb_slave.v.bak
vga\wb_b3_check.v
vga\wb_b3_check.v.bak
vga\wb_mast_model.v
vga\wb_model_defines.v
vga\wb_model_defines.v.bak
vga\wb_slv_model.v
vga\wb_slv_model.v.bak
vga\xst\work\hdllib.ref
vga\xst\work\vlg7B\vga_tgen.bin
vga\xst\work\vlg7B
vga\xst\work\vlg6A\vga_enh_top.bin
vga\xst\work\vlg6A
vga\xst\work\vlg5F\vga_colproc.bin
vga\xst\work\vlg5F
vga\xst\work\vlg5D\vga_fifo.bin
vga\xst\work\vlg5D
vga\xst\work\vlg59\vga_clkgen.bin
vga\xst\work\vlg59
vga\xst\work\vlg53\generic_spram.bin
vga\xst\work\vlg53
vga\xst\work\vlg4D\vga_csm_pb.bin
vga\xst\work\vlg4D\vga_vtim.bin
vga\xst\work\vlg4D
vga\xst\work\vlg34\generic_dpram.bin
vga\xst\work\vlg34
vga\xst\work\vlg07\vga_fifo_dc.bin
vga\xst\work\vlg07\vga_pgen.bin
vga\xst\work\vlg07
vga\xst\work\vlg05\vga_wb_master.bin
vga\xst\work\vlg05
vga\xst\work\vlg04\vga_wb_slave.bin
vga\xst\work\vlg04
vga\xst\work
vga\xst
vga\__projnav\coregen.rsp
vga\__projnav\runXst_tcl.rsp
vga\__projnav\vga.gfl
vga\__projnav\vga_enh_top.xst
vga\__projnav\vga_flowplus.gfl
vga\__projnav\xst_sprjTOstx_tcl.rsp
vga\__projnav
vga
I2C\I2C.dhp
I2C\I2C.npl
I2C\__projnav.log
I2C\automake.log
I2C\coregen.log
I2C\coregen.prj
I2C\i2c_master_bit_ctrl.cmd_log
I2C\i2c_master_bit_ctrl.lso
I2C\i2c_master_bit_ctrl.ngc
I2C\i2c_master_bit_ctrl.ngr
I2C\i2c_master_bit_ctrl.prj
I2C\i2c_master_bit_ctrl.stx
I2C\i2c_master_bit_ctrl.syr
I2C\i2c_master_bit_ctrl.v
I2C\i2c_master_bit_ctrl.v.bak
I2C\i2c_master_bit_ctrl_vhdl.prj
I2C\i2c_master_byte_ctrl.cmd_log
I2C\i2c_master_byte_ctrl.lso
I2C\i2c_master_byte_ctrl.ngc
I2C\i2c_master_byte_ctrl.ngr
I2C\i2c_master_byte_ctrl.prj
I2C\i2c_master_byte_ctrl.stx
I2C\i2c_master_byte_ctrl.syr
I2C\i2c_master_byte_ctrl.v
I2C\i2c_master_byte_ctrl.v.bak
I2C\i2c_master_byte_ctrl_vhdl.prj
I2C\i2c_master_defines.v
I2C\i2c_master_defines.v.bak
I2C\i2c_master_top.cmd_log
I2C\i2c_master_top.lso
I2C\i2c_master_top.ngc
I2C\i2c_master_top.ngr
I2C\i2c_master_top.prj
I2C\i2c_master_top.stx
I2C\i2c_master_top.syr
I2C\i2c_master_top.v
I2C\i2c_master_top.v.bak
I2C\i2c_master_top_vhdl.prj
I2C\i2c_slave_model.fdo
I2C\i2c_slave_model.ndo
I2C\i2c_slave_model.udo
I2C\i2c_slave_model.v
I2C\i2c_slave_model.v.bak
I2C\prjname.lso
I2C\timescale.v
I2C\transcript
I2C\tst_bench_top.v
I2C\wb_master_model.v
I2C\wb_master_model.v.bak
I2C\xst\work\hdllib.ref
I2C\xst\work\vlg67\i2c_master_top.bin
I2C\xst\work\vlg67
I2C\xst\work\vlg5C\i2c_master_byte_ctrl.bin
I2C\xst\work\vlg5C
I2C\xst\work\vlg07\i2c_master_bit_ctrl.bin
I2C\xst\work\vlg07
I2C\xst\work
I2C\xst
I2C\work\_info
I2C\work\i2c_slave_model\_primary.dat
I2C\work\i2c_slave_model\_primary.vhd
I2C\work\i2c_slave_model\verilog.asm
I2C\work\i2c_slave_model
I2C\work\glbl\_primary.dat
I2C\work\glbl\_primary.vhd
I2C\work\glbl\verilog.asm
I2C\work\glbl
I2C\work
I2C\__projnav\I2C.gfl
I2C\__projnav\I2C_flowplus.gfl
I2C\__projnav\coregen.rsp
I2C\__projnav\i2c_master_bit_ctrl.xst
I2C\__projnav\i2c_master_byte_ctrl.xst
I2C\__projnav\i2c_master_top.xst
I2C\__projnav\runXst_tcl.rsp
I2C\__projnav\xst_sprjTOstx_tcl.rsp
I2C\__projnav
I2C
UART\UART.npl
UART\UART_PACKAGE.vhd
UART\__projnav.log
UART\automake.log
UART\baudrate_generator.jhd
UART\baudrate_generator.vhd
UART\baudrate_generator_TB.jhd
UART\baudrate_generator_TB.vhd
UART\counter.jhd
UART\counter.vhd
UART\counter_TB.jhd
UART\counter_TB.vhd
UART\detector.jhd
UART\detector.vhd
UART\detector_TB.jhd
UART\detector_TB.vhd
UART\parity_verifier.jhd
UART\parity_verifier.vhd
UART\parity_verifier_TB.jhd
UART\parity_verifier_TB.vhd
UART\shift_register.jhd
UART\shift_register.vhd
UART\shift_register_TB.jhd
UART\shift_register_TB.vhd
UART\switch.jhd
UART\switch.vhd
UART\switch_bus.jhd
UART\switch_bus.vhd
UART\switch_bus_TB.jhd
UART\switch_bus_TB.vhd
UART\uart_core.jhd
UART\uart_core.vhd
UART\uart_top.jhd
UART\uart_top.vhd
UART\uart_top_tb.jhd
UART\uart_top_tb.vhd
UART\__projnav\p00p5000.kis
UART\__projnav\p00pi000.kis
UART\__projnav\p00pl000.kis
UART\__projnav\runXst_tcl.rsp
UART\__projnav
UART

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