文件名称:vhd100examples
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使用vhdl语言编写的100个常用程序的例子
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压缩包 : 17869316vhd100examples.rar 列表 vhd100例\100vhdl0621\100vhdl例子\10_function\10_bit_to_int.vhd vhd100例\100vhdl0621\100vhdl例子\10_function\README.TXT vhd100例\100vhdl0621\100vhdl例子\11_wiredor\11_wiredor.vhd vhd100例\100vhdl0621\100vhdl例子\11_wiredor\README.TXT vhd100例\100vhdl0621\100vhdl例子\12_convert\12_convert.vhd vhd100例\100vhdl0621\100vhdl例子\12_convert\README.TXT vhd100例\100vhdl0621\100vhdl例子\13_SHL\13_SHL.VHD vhd100例\100vhdl0621\100vhdl例子\13_SHL\README.TXT vhd100例\100vhdl0621\100vhdl例子\14_MVL7_functions\14_MVL7_functions.vhd vhd100例\100vhdl0621\100vhdl例子\14_MVL7_functions\README.TXT vhd100例\100vhdl0621\100vhdl例子\15_MUX41\15_MUX41.VHD vhd100例\100vhdl0621\100vhdl例子\15_MUX41\15_MVL7_functions.vhd vhd100例\100vhdl0621\100vhdl例子\15_MUX41\15_MVL7_syn_types.vhd vhd100例\100vhdl0621\100vhdl例子\15_MUX41\15_test_vectors_mux41.vhd vhd100例\100vhdl0621\100vhdl例子\15_MUX41\15_TYPES.VHD vhd100例\100vhdl0621\100vhdl例子\15_MUX41\README.TXT vhd100例\100vhdl0621\100vhdl例子\16_MUX\16_multiple_mux.vhd vhd100例\100vhdl0621\100vhdl例子\16_MUX\16_MVL7_functions.vhd vhd100例\100vhdl0621\100vhdl例子\16_MUX\16_test_vectors.vhd vhd100例\100vhdl0621\100vhdl例子\16_MUX\16_TYPES.VHD vhd100例\100vhdl0621\100vhdl例子\16_MUX\README.TXT vhd100例\100vhdl0621\100vhdl例子\16_MUX\TYPES.VHD vhd100例\100vhdl0621\100vhdl例子\17_parity\17_parity.vhd vhd100例\100vhdl0621\100vhdl例子\17_parity\17_test_bench.vhd vhd100例\100vhdl0621\100vhdl例子\17_parity\README.TXT vhd100例\100vhdl0621\100vhdl例子\18_LIB\18_tech_lib.vhd vhd100例\100vhdl0621\100vhdl例子\18_LIB\18_test_lib.vhd vhd100例\100vhdl0621\100vhdl例子\18_LIB\README.TXT vhd100例\100vhdl0621\100vhdl例子\19_test_194\19_test_194.vhd vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\1_ADDER.exp vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\files\L1.rpt vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\files\L2.rpt vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\files\L3.rpt vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\aa\ADDER.sim vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\aa\ADDER.syn vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\aa\Anal.info vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\aa\Anal.out vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\WORK\Anal.info vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\WORK\Anal.out vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\WORK\BIT_RTL_ADDER.sim vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER\workdirs\WORK\BIT_RTL_ADDER.syn vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_adder.acf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_adder.hif vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_adder.mmf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\1_ADDER.VHD vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bir_rtl_adder.acf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bir_rtl_adder.hif vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bir_rtl_adder.mmf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bir_rtl_adder.tdf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bit_rtl_adder.acf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bit_rtl_adder.hif vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bit_rtl_adder.mmf vhd100例\100vhdl0621\100vhdl例子\1_ADDER\bit_rtl_adder.vhd vhd100例\100vhdl0621\100vhdl例子\1_ADDER\LIB.DLS vhd100例\100vhdl0621\100vhdl例子\1_ADDER\README.TXT vhd100例\100vhdl0621\100vhdl例子\1_ADDER\U2268397.DLS vhd100例\100vhdl0621\100vhdl例子\20_test_159\20_test_159.vhd vhd100例\100vhdl0621\100vhdl例子\21_test_13a\21_test_13a.vhd vhd100例\100vhdl0621\100vhdl例子\22_deadlock\22_deadlock.vhd vhd100例\100vhdl0621\100vhdl例子\23_test_120\23_Test_120.vhd vhd100例\100vhdl0621\100vhdl例子\24_test_195\24_test_195.vhd vhd100例\100vhdl0621\100vhdl例子\25_test_1\25_test_1.vhd vhd100例\100vhdl0621\100vhdl例子\25_test_1\25_test_1a.vhd vhd100例\100vhdl0621\100vhdl例子\26_test_74s\26_test_74s.vhd vhd100例\100vhdl0621\100vhdl例子\27_test_16\27_test_16.vhd vhd100例\100vhdl0621\100vhdl例子\28_test_64a\28_Test_64a.vhd vhd100例\100vhdl0621\100vhdl例子\29_test_35\29_Test_35.vhd vhd100例\100vhdl0621\100vhdl例子\2_ADDER\2_ADDER.VHD vhd100例\100vhdl0621\100vhdl例子\2_ADDER\README.TXT vhd100例\100vhdl0621\100vhdl例子\30_test_3\30_Test_3.vhd vhd100例\100vhdl0621\100vhdl例子\31_test_35b\31_test_35b.vhd vhd100例\100vhdl0621\100vhdl例子\32_test_110b\32_test_110b.vhd vhd100例\100vhdl0621\100vhdl例子\33_comparer\33_COMP.VHD vhd100例\100vhdl0621\100vhdl例子\33_comparer\33_comparer.vhd vhd100例\100vhdl0621\100vhdl例子\33_comparer\33_SIMU.VHD vhd100例\100vhdl0621\100vhdl例子\33_comparer\README.TXT vhd100例\100vhdl0621\100vhdl例子\34_BUS\34_readwrite.VHD vhd100例\100vhdl0621\100vhdl例子\34_BUS\34_readwrite_stim.vhd vhd100例\100vhdl0621\100vhdl例子\34_BUS\README.TXT vhd100例\100vhdl0621\100vhdl例子\35_486_bus\35_486_bus.vhd vhd100例\100vhdl0621\100vhdl例子\35_486_bus\35_486_sys.vhd vhd100例\100vhdl0621\100vhdl例子\35_486_bus\35_bit_pack.vhd vhd100例\100vhdl0621\100vhdl例子\35_486_bus\35_bus_test.vhd vhd100例\100vhdl0621\100vhdl例子\35_486_bus\35_ram_controller.vhd vhd100例\100vhdl0621\100vhdl例子\35_486_bus\75_RAM.VHD vhd100例\100vhdl0621\100vhdl例子\35_486_bus\README.TXT vhd100例\100vhdl0621\100vhdl例子\36_GCD\36_GCD.VHD vhd100例\100vhdl0621\100vhdl例子\36_GCD\36_TEST.VHD vhd100例\100vhdl0621\100vhdl例子\36_GCD\README.TXT vhd100例\100vhdl0621\100vhdl例子\37_test_105\37_test_105.vhd vhd100例\100vhdl0621\100vhdl例子\38_test_28\38_Test_28.vhd vhd100例\100vhdl0621\100vhdl例子\39_wst0dp\39_wst0dp.vhd vhd100例\100vhdl0621\100vhdl例子\39_wst0dp\README.TXT vhd100例\100vhdl0621\100vhdl例子\3_MUL\3_MUL.VHD vhd100例\100vhdl0621\100vhdl例子\3_MUL\README.TXT vhd100例\100vhdl0621\100vhdl例子\40_generic_dec\40_generic_dec.vhd vhd100例\100vhdl0621\100vhdl例子\40_generic_dec\README.TXT vhd100例\100vhdl0621\100vhdl例子\41_generic_testbench\40_generic_dec.vhd vhd100例\100vhdl0621\100vhdl例子\41_generic_testbench\41_generic_testbench.vhd vhd100例\100vhdl0621\100vhdl例子\41_generic_testbench\README.TXT vhd100例\100vhdl0621\100vhdl例子\42_MIX\42_MIX.VHD vhd100例\100vhdl0621\100vhdl例子\42_MIX\README.TXT vhd100例\100vhdl0621\100vhdl例子\43_register\43_shift_reg.vhd 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vhd100例\100vhdl0621\100vhdl例子\51_test_113\51_test_113.vhd vhd100例\100vhdl0621\100vhdl例子\52_divider\52_DIVIDER.vhd vhd100例\100vhdl0621\100vhdl例子\52_divider\52_Divider_stim.vhd vhd100例\100vhdl0621\100vhdl例子\52_divider\README.TXT vhd100例\100vhdl0621\100vhdl例子\53_counter\53_counter.vhd vhd100例\100vhdl0621\100vhdl例子\53_counter\53_counter_testbench.vhd vhd100例\100vhdl0621\100vhdl例子\53_counter\README.TXT vhd100例\100vhdl0621\100vhdl例子\54_display\54_display.vhd vhd100例\100vhdl0621\100vhdl例子\54_display\54_display_stim.vhd vhd100例\100vhdl0621\100vhdl例子\54_display\README.TXT vhd100例\100vhdl0621\100vhdl例子\55_falsepath\55_falsepath.vhd vhd100例\100vhdl0621\100vhdl例子\55_falsepath\55_falsepath_stim.vhd vhd100例\100vhdl0621\100vhdl例子\55_falsepath\README.TXT vhd100例\100vhdl0621\100vhdl例子\56_prefetch\56_prefetch.vhd vhd100例\100vhdl0621\100vhdl例子\56_prefetch\56_STIM.VHD vhd100例\100vhdl0621\100vhdl例子\56_prefetch\56_Vhdl.vhd vhd100例\100vhdl0621\100vhdl例子\56_prefetch\README.TXT vhd100例\100vhdl0621\100vhdl例子\57_instruction_dec\57_instruction_dec.vhd vhd100例\100vhdl0621\100vhdl例子\58_decoder\58_decoder.vhd vhd100例\100vhdl0621\100vhdl例子\59_decoder\59_decoder.vhd vhd100例\100vhdl0621\100vhdl例子\5_MUX2\5_MUX2.VHD vhd100例\100vhdl0621\100vhdl例子\5_MUX2\README.TXT vhd100例\100vhdl0621\100vhdl例子\61_assign\61_assign.vhd vhd100例\100vhdl0621\100vhdl例子\61_assign\61_Logic.vhd vhd100例\100vhdl0621\100vhdl例子\61_assign\README.TXT vhd100例\100vhdl0621\100vhdl例子\62_GCD\62_GCD.VHD vhd100例\100vhdl0621\100vhdl例子\62_GCD\62_gcd_stim.vhd vhd100例\100vhdl0621\100vhdl例子\62_GCD\README.TXT vhd100例\100vhdl0621\100vhdl例子\63_gcd_disp\63_gcd_disp.vhd vhd100例\100vhdl0621\100vhdl例子\63_gcd_disp\63_STIM.VHD vhd100例\100vhdl0621\100vhdl例子\63_gcd_disp\63_VHDL.VHD vhd100例\100vhdl0621\100vhdl例子\63_gcd_disp\README.TXT vhd100例\100vhdl0621\100vhdl例子\64_TLC\64_test_vectors.vhd vhd100例\100vhdl0621\100vhdl例子\64_TLC\64_TLC.VHD vhd100例\100vhdl0621\100vhdl例子\64_TLC\README.TXT vhd100例\100vhdl0621\100vhdl例子\65_conditioner\65_conditioner.VHD vhd100例\100vhdl0621\100vhdl例子\65_conditioner\65_conditioner_stim.VHD vhd100例\100vhdl0621\100vhdl例子\65_conditioner\README.TXT vhd100例\100vhdl0621\100vhdl例子\66_FIR\66_FIR.VHD vhd100例\100vhdl0621\100vhdl例子\66_FIR\66_PACK.VHD vhd100例\100vhdl0621\100vhdl例子\66_FIR\66_signed.vhd vhd100例\100vhdl0621\100vhdl例子\66_FIR\66_testfir.vhd vhd100例\100vhdl0621\100vhdl例子\67_ellipf\67_ellipf.vhd vhd100例\100vhdl0621\100vhdl例子\67_ellipf\67_PACK.VHD vhd100例\100vhdl0621\100vhdl例子\67_ellipf\67_test_vector.vhd vhd100例\100vhdl0621\100vhdl例子\67_ellipf\README.TXT vhd100例\100vhdl0621\100vhdl例子\68_alarm_controller\68_alarm_controller.vhd vhd100例\100vhdl0621\100vhdl例子\68_alarm_controller\68_tb_alarm_controller.vhd vhd100例\100vhdl0621\100vhdl例子\68_alarm_controller\69_p_alarm_clock.vhd vhd100例\100vhdl0621\100vhdl例子\68_alarm_controller\README.TXT vhd100例\100vhdl0621\100vhdl例子\69_decoder\69_decoder.vhd vhd100例\100vhdl0621\100vhdl例子\69_decoder\69_p_alarm_clock.vhd vhd100例\100vhdl0621\100vhdl例子\69_decoder\69_tb_decoder.vhd vhd100例\100vhdl0621\100vhdl例子\69_decoder\README.TXT vhd100例\100vhdl0621\100vhdl例子\6_REG\6_REG.VHD vhd100例\100vhdl0621\100vhdl例子\6_REG\README.TXT vhd100例\100vhdl0621\100vhdl例子\70_alarm_buffer\69_p_alarm_clock.vhd vhd100例\100vhdl0621\100vhdl例子\70_alarm_buffer\70_buffer.vhd vhd100例\100vhdl0621\100vhdl例子\70_alarm_buffer\70_tb_buffer.vhd vhd100例\100vhdl0621\100vhdl例子\70_alarm_buffer\README.TXT vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\69_p_alarm_clock.vhd vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\71_alarm_counter.vhd vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\71_alarm_reg.vhd vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\71_tb_alarm_counter.vhd vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\71_tb_alarm_reg.vhd vhd100例\100vhdl0621\100vhdl例子\71_alarm_counter\README.TXT vhd100例\100vhdl0621\100vhdl例子\72_alarm_display\69_p_alarm_clock.vhd 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