文件名称:sum
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- 其它资源
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- [Text]
- 上传时间:
- 2008-10-13
- 文件大小:
- 743.15kb
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- 0次
- 提 供 者:
- figur*****
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- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
这是一个用VHDL写的简易的CPU的程序,共支持10条指令。使用微指令方式。包括.bit文件。下载到FPGA芯片上成功。注解不小心忘记保存。
(系统自动生成,下载前可以参看下载内容)
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压缩包 : 103244858sum.rar 列表 sum\automake.log sum\bitgen.ut sum\clock.vhdl sum\coregen.log sum\coregen.prj sum\cu.vhd sum\fin.ANT sum\fin.fdo sum\fin.tbw sum\fin.udo sum\fin.vhw sum\ieu.cmd_log sum\ieu.lso sum\ieu.ngc sum\ieu.ngr sum\ieu.prj sum\ieu.stx sum\ieu.syr sum\ieu.vhdl sum\msi.vhdl sum\pepExtractor.prj sum\results.txt sum\sum_map.ncd sum\sum.pcf sum\sum.nc1 sum\sum.cmd_log sum\sum.dhp sum\sum.par sum\sum.lso sum\sum.ncd sum\sum_pad.csv sum\sum.pad sum\sum_pad.txt sum\sum.twr sum\sum.ngm sum\sum.twx sum\sum.npl sum\sum.bgn sum\sum.pad_txt sum\sum.placed_ncd_tracker sum\sum.drc sum\sum.bit sum\sum.prj sum\sum.routed_ncd_tracker sum\sum.ngr sum\sum.syr sum\sum.ngc sum\pp.tbw sum\sum.ucf sum\sum.ucf.untf sum\sum.ut sum\sum.vhdl sum\sum.bld sum\sum.ngd sum\clock.prj sum\clock.lso sum\transcript sum\vsim.wlf sum\work\clock\main.dat sum\work\clock\main.psm sum\work\clock\_primary.dat sum\work\clock sum\work\cu\main.dat sum\work\cu\main.psm sum\work\cu\_primary.dat sum\work\cu sum\work\fin\testbench_arch.dat sum\work\fin\testbench_arch.psm sum\work\fin\_primary.dat sum\work\fin sum\work\ieu\main.dat sum\work\ieu\main.psm sum\work\ieu\_primary.dat sum\work\ieu sum\work\msi\main.dat sum\work\msi\main.psm sum\work\msi\_primary.dat sum\work\msi sum\work\sum\behav.dat sum\work\sum\behav.psm sum\work\sum\_primary.dat sum\work\sum sum\work\sum_cfg\_primary.dat sum\work\sum_cfg\_vhdl.psm sum\work\sum_cfg sum\work\_info sum\work\pp\_primary.dat sum\work\pp\testbench_arch.dat sum\work\pp\testbench_arch.psm sum\work\pp sum\work\ss\_primary.dat sum\work\ss\testbench_arch.dat sum\work\ss\testbench_arch.psm sum\work\ss sum\work\clock_cfg\_primary.dat sum\work\clock_cfg\_vhdl.psm sum\work\clock_cfg sum\work sum\xst\work\hdllib.ref sum\xst\work\sub00\vhpl00.vho sum\xst\work\sub00\vhpl01.vho sum\xst\work\sub00\vhpl02.vho sum\xst\work\sub00\vhpl03.vho sum\xst\work\sub00\vhpl04.vho sum\xst\work\sub00\vhpl05.vho sum\xst\work\sub00\vhpl06.vho sum\xst\work\sub00\vhpl07.vho sum\xst\work\sub00\vhpl08.vho sum\xst\work\sub00\vhpl09.vho sum\xst\work\sub00 sum\xst\work\hdpdeps.ref sum\xst\work sum\xst sum\_ngo\netlist.lst sum\_ngo sum\__projnav\bitgen.rsp sum\__projnav\coregen.rsp sum\__projnav\ednTOngd_tcl.rsp sum\__projnav\hb_cmds sum\__projnav\ieu.xst sum\__projnav\nc1TOncd_tcl.rsp sum\__projnav\parentEditConstraintsTextApp_tcl.rsp sum\__projnav\posttrc.log sum\__projnav\runXst_tcl.rsp sum\__projnav\sum.gfl sum\__projnav\sum.xst sum\__projnav\sum_flowplus.gfl sum\__projnav\sum_ncdTOut_tcl.rsp sum\__projnav\clock.xst sum\__projnav\clock_ncdTOut_tcl.rsp sum\__projnav\map.log sum\__projnav\par.log sum\__projnav sum\__projnav.log sum\clock.cmd_log sum\clock.syr sum\clock.ngr sum\clock.ngc sum\clock.stx sum\clock.bld sum\clock.ngd sum\.untf sum\clock.par sum\clock.ncd sum\clock_map.ngm sum\clock_map.ncd sum\clock.pcf sum\clock.nc1 sum\clock.ngm sum\clock.mrp sum\clock.xpi sum\clock_pad.csv sum\clock.pad sum\clock_pad.txt sum\clock.placed_ncd_tracker sum\clock.routed_ncd_tracker sum\clock.pad_txt sum\clock.twr sum\clock.twx sum\clock.ut sum\clock.bgn sum\clock.drc sum\clock.bit sum\sum_map.ngm sum\ss.tbw sum\pp.vhw sum\pp.ANT sum\pp.udo sum\pp.fdo sum\ss.vhw sum\ss.ANT sum\ss.udo sum\ss.fdo sum\sum.stx sum\sum_last_par.ncd sum\sum.mrp sum\sum.xpi sum