FPGA

FPGA\FSMC_MUL.qpf

FPGA\FSMC_MUL.qsf

FPGA\FSMC_MUL.qws

FPGA\FSMC_MUL_assignment_defaults.qdf

FPGA\PLLJ_PLLSPE_INFO.txt

FPGA\db

FPGA\db\FSMC_MUL.db_info

FPGA\db\FSMC_MUL.sld_design_entry.sci

FPGA\greybox_tmp

FPGA\greybox_tmp\cbx_args.txt

FPGA\iCore3.tcl

FPGA\incremental_db

FPGA\incremental_db\README

FPGA\incremental_db\compiled_partitions

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autoh_e40e1.map.dpi

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autoh_e40e1.map.kpt

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autoh_e40e1.map.logdb

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autos_3e921.map.dpi

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autos_3e921.map.kpt

FPGA\incremental_db\compiled_partitions\FSMC_MUL.autos_3e921.map.logdb

FPGA\incremental_db\compiled_partitions\FSMC_MUL.db_info

FPGA\incremental_db\compiled_partitions\FSMC_MUL.root_partition.cmp.dfp

FPGA\incremental_db\compiled_partitions\FSMC_MUL.root_partition.cmp.logdb

FPGA\incremental_db\compiled_partitions\FSMC_MUL.root_partition.map.dpi

FPGA\incremental_db\compiled_partitions\FSMC_MUL.root_partition.map.kpt

FPGA\my_ram.qip

FPGA\output_files

FPGA\output_files\FSMC_MUL.asm.rpt

FPGA\output_files\FSMC_MUL.cdf

FPGA\output_files\FSMC_MUL.done

FPGA\output_files\FSMC_MUL.eda.rpt

FPGA\output_files\FSMC_MUL.fit.rpt

FPGA\output_files\FSMC_MUL.fit.smsg

FPGA\output_files\FSMC_MUL.fit.summary

FPGA\output_files\FSMC_MUL.flow.rpt

FPGA\output_files\FSMC_MUL.jdi

FPGA\output_files\FSMC_MUL.map.rpt

FPGA\output_files\FSMC_MUL.map.summary

FPGA\output_files\FSMC_MUL.pin

FPGA\output_files\FSMC_MUL.sof

FPGA\output_files\FSMC_MUL.sta.rpt

FPGA\output_files\FSMC_MUL.sta.summary

FPGA\output_files\greybox_tmp

FPGA\output_files\greybox_tmp\cbx_args.txt

FPGA\output_files\my_ram.qip

FPGA\output_files\stp1.stp

FPGA\simulation

FPGA\simulation\modelsim

FPGA\simulation\modelsim\FSMC_MUL.sft

FPGA\simulation\modelsim\FSMC_MUL.vho

FPGA\simulation\modelsim\FSMC_MUL_8_1200mv_0c_slow.vho

FPGA\simulation\modelsim\FSMC_MUL_8_1200mv_0c_vhd_slow.sdo

FPGA\simulation\modelsim\FSMC_MUL_8_1200mv_85c_slow.vho

FPGA\simulation\modelsim\FSMC_MUL_8_1200mv_85c_vhd_slow.sdo

FPGA\simulation\modelsim\FSMC_MUL_min_1200mv_0c_fast.vho

FPGA\simulation\modelsim\FSMC_MUL_min_1200mv_0c_vhd_fast.sdo

FPGA\simulation\modelsim\FSMC_MUL_modelsim.xrf

FPGA\simulation\modelsim\FSMC_MUL_vhd.sdo

FPGA\src

FPGA\src\FSMC_Ctrl.v

FPGA\src\FSMC_Ctrl.v.bak

FPGA\src\FSMC_MUL.v

FPGA\src\FSMC_MUL.v.bak

FPGA\src\RST_n.v

FPGA\src\greybox_tmp

FPGA\src\greybox_tmp\cbx_args.txt

FPGA\src\my_pll.ppf

FPGA\src\my_pll.qip

FPGA\src\my_pll.v

FPGA\src\my_pll_bb.v

FPGA\src\my_ram.qip

FPGA\src\my_ram.v

FPGA\src\my_ram_bb.v