文件名称:Altera-verilog-StepMotor

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2017-10-08
  • 文件大小:
  • 300kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 武**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

使用Altera FPGA平台,Verilog编程语言,编写步进电机驱动程序,已在开发板上验证;(on altera fpga flatform, use verilog language, driving stepmotor, and test ok.)
相关搜索: Altera-Veriolog
Stepmotor

(系统自动生成,下载前可以参看下载内容)

下载文件列表

Altera-verilog-StepMotor\db\logic_util_heursitic.dat

Altera-verilog-StepMotor\db\prev_cmp_StepMotor.qmsg

Altera-verilog-StepMotor\db\StepMotor.amm.cdb

Altera-verilog-StepMotor\db\StepMotor.asm.qmsg

Altera-verilog-StepMotor\db\StepMotor.asm.rdb

Altera-verilog-StepMotor\db\StepMotor.cbx.xml

Altera-verilog-StepMotor\db\StepMotor.cmp.bpm

Altera-verilog-StepMotor\db\StepMotor.cmp.cdb

Altera-verilog-StepMotor\db\StepMotor.cmp.hdb

Altera-verilog-StepMotor\db\StepMotor.cmp.kpt

Altera-verilog-StepMotor\db\StepMotor.cmp.logdb

Altera-verilog-StepMotor\db\StepMotor.cmp.rdb

Altera-verilog-StepMotor\db\StepMotor.cmp0.ddb

Altera-verilog-StepMotor\db\StepMotor.cmp_merge.kpt

Altera-verilog-StepMotor\db\StepMotor.db_info

Altera-verilog-StepMotor\db\StepMotor.eda.qmsg

Altera-verilog-StepMotor\db\StepMotor.fit.qmsg

Altera-verilog-StepMotor\db\StepMotor.hier_info

Altera-verilog-StepMotor\db\StepMotor.hif

Altera-verilog-StepMotor\db\StepMotor.idb.cdb

Altera-verilog-StepMotor\db\StepMotor.lpc.html

Altera-verilog-StepMotor\db\StepMotor.lpc.rdb

Altera-verilog-StepMotor\db\StepMotor.lpc.txt

Altera-verilog-StepMotor\db\StepMotor.map.bpm

Altera-verilog-StepMotor\db\StepMotor.map.cdb

Altera-verilog-StepMotor\db\StepMotor.map.hdb

Altera-verilog-StepMotor\db\StepMotor.map.kpt

Altera-verilog-StepMotor\db\StepMotor.map.logdb

Altera-verilog-StepMotor\db\StepMotor.map.qmsg

Altera-verilog-StepMotor\db\StepMotor.map.rdb

Altera-verilog-StepMotor\db\StepMotor.map_bb.cdb

Altera-verilog-StepMotor\db\StepMotor.map_bb.hdb

Altera-verilog-StepMotor\db\StepMotor.map_bb.logdb

Altera-verilog-StepMotor\db\StepMotor.pre_map.cdb

Altera-verilog-StepMotor\db\StepMotor.pre_map.hdb

Altera-verilog-StepMotor\db\StepMotor.root_partition.map.reg_db.cdb

Altera-verilog-StepMotor\db\StepMotor.routing.rdb

Altera-verilog-StepMotor\db\StepMotor.rtlv.hdb

Altera-verilog-StepMotor\db\StepMotor.rtlv_sg.cdb

Altera-verilog-StepMotor\db\StepMotor.rtlv_sg_swap.cdb

Altera-verilog-StepMotor\db\StepMotor.sgdiff.cdb

Altera-verilog-StepMotor\db\StepMotor.sgdiff.hdb

Altera-verilog-StepMotor\db\StepMotor.sld_design_entry.sci

Altera-verilog-StepMotor\db\StepMotor.sld_design_entry_dsc.sci

Altera-verilog-StepMotor\db\StepMotor.smart_action.txt

Altera-verilog-StepMotor\db\StepMotor.sta.qmsg

Altera-verilog-StepMotor\db\StepMotor.sta.rdb

Altera-verilog-StepMotor\db\StepMotor.sta_cmp.8_slow.tdb

Altera-verilog-StepMotor\db\StepMotor.syn_hier_info

Altera-verilog-StepMotor\db\StepMotor.tis_db_list.ddb

Altera-verilog-StepMotor\gen_divd.v

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.db_info

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.cdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.dfp

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.hdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.kpt

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.logdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.cmp.rcfdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.cdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.dpi

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.hbdb.cdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.hbdb.hb_info

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.hbdb.hdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.hbdb.sig

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.hdb

Altera-verilog-StepMotor\incremental_db\compiled_partitions\StepMotor.root_partition.map.kpt

Altera-verilog-StepMotor\incremental_db\README

Altera-verilog-StepMotor\simulation\modelsim\StepMotor.sft

Altera-verilog-StepMotor\simulation\modelsim\StepMotor.vho

Altera-verilog-StepMotor\simulation\modelsim\StepMotor_modelsim.xrf

Altera-verilog-StepMotor\simulation\modelsim\StepMotor_vhd.sdo

Altera-verilog-StepMotor\STcl.tcl

Altera-verilog-StepMotor\StepM.v.bak

Altera-verilog-StepMotor\StepMotor.asm.rpt

Altera-verilog-StepMotor\StepMotor.cdf

Altera-verilog-StepMotor\StepMotor.done

Altera-verilog-StepMotor\StepMotor.eda.rpt

Altera-verilog-StepMotor\StepMotor.fit.rpt

Altera-verilog-StepMotor\StepMotor.fit.smsg

Altera-verilog-StepMotor\StepMotor.fit.summary

Altera-verilog-StepMotor\StepMotor.flow.rpt

Altera-verilog-StepMotor\StepMotor.jdi

Altera-verilog-StepMotor\StepMotor.map.rpt

Altera-verilog-StepMotor\StepMotor.map.summary

Altera-verilog-StepMotor\StepMotor.pin

Altera-verilog-StepMotor\StepMotor.pof

Altera-verilog-StepMotor\StepMotor.qpf

Altera-verilog-StepMotor\StepMotor.qsf

Altera-verilog-StepMotor\StepMotor.qws

Altera-verilog-StepMotor\StepMotor.sof

Altera-verilog-StepMotor\StepMotor.sta.rpt

Altera-verilog-StepMotor\StepMotor.sta.summary

Altera-verilog-StepMotor\StepMotor.v

Altera-verilog-StepMotor\incremental_db\compiled_partitions

Altera-verilog-StepMotor\simulation\modelsim

Altera-verilog-StepMotor\db

Altera-verilog-StepMotor\incremental_db

Altera-verilog-StepMotor\simulation

Altera-verilog-StepMotor

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