文件名称:_MATLAB_AND_FPGA_AlteraVerilog
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数字通信同步技术的MATLAB与FPGA实现 Altera/Verilog版- U6570 u5B57 u901A u4FE1 u540C u6B65 u6280 u672F u7684MATLAB u4E0EFPGA u5B9E u73B0 Altera/Verilog u7248
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数字通信同步技术的MATLAB与FPGA实现：AlteraVerilog版\数字通信同步技术的MATLAB与FPGA实现——AlteraVerilog版\Chapter_2\E2_1_SymbExam\incremental_db\compiled_partitions\SymbExam.db_info
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.ammdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.cdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.dfp
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.hdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.kpt
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.logdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.cmp.rcfdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.cdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.dpi
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.hbdb.cdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.hbdb.hb_info
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.hbdb.hdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.hbdb.sig
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.hdb
...................................................\.....................................................\.........\.............\..............\...................\SymbExam.root_partition.map.kpt
...................................................\.....................................................\.........\.............\..............\README
...................................................\.....................................................\.........\.............\quartus_nativelink_synthesis.log
...................................................\.....................................................\.........\.............\simulation\modelsim\modelsim.ini
...................................................\.....................................................\.........\.............\..........\........\msim_transcript
...................................................\.....................................................\.........\.............\..........\........\rtl_work\@symb@exam\verilog.prw
...................................................\...............................................