文件名称:HDB3
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针对数字基带传输系统中HDB3信号的特点，采用基于FPGA的Verilog HDL语言，实现HDB3数字基带信号的编码器设计,共有插V、插B、单双极性变换模块，最终能在FPGA实现。-For digital baseband transmission system HDB3 signal characteristics, based on FPGA Verilog HDL language, designed to achieve HDB3 encoder digital baseband signal, a total insertion V, B plug, single and double polarity conversion module, eventually realized in FPGA.
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下载文件列表
HDB3\bingchuan.bsf
....\bingchuan.v
....\bingchuan.v.bak
....\decode1.bsf
....\decode1.v
....\decode1.v.bak
....\hdb3.asm.rpt
....\hdb3.bdf
....\hdb3.bsf
....\hdb3.done
....\hdb3.dpf
....\hdb3.eda.rpt
....\hdb3.fit.rpt
....\hdb3.fit.smsg
....\hdb3.fit.summary
....\hdb3.flow.rpt
....\hdb3.map.rpt
....\hdb3.map.summary
....\hdb3.pin
....\hdb3.pof
....\hdb3.qpf
....\hdb3.qsf
....\hdb3.sim.rpt
....\hdb3.sof
....\hdb3.tan.rpt
....\hdb3.tan.summary
....\hdb3.vwf
....\insert_b.bsf
....\insert_b.v
....\insert_b.v.bak
....\insert_v.bsf
....\insert_v.v
....\insert_v.v.bak
....\polarity.bsf
....\polarity.v
....\polarity.v.bak
....\test.vwf
....\v.bdf
....\v.vwf
....\db\add_sub_1rh.tdf
....\..\add_sub_3rh.tdf
....\..\hdb3.asm.qmsg
....\..\hdb3.asm.rdb
....\..\hdb3.cbx.xml
....\..\hdb3.cmp.bpm
....\..\hdb3.cmp.cdb
....\..\hdb3.cmp.ecobp
....\..\hdb3.cmp.hdb
....\..\hdb3.cmp.kpt
....\..\hdb3.cmp.logdb
....\..\hdb3.cmp.rdb
....\..\hdb3.cmp.tdb
....\..\hdb3.cmp0.ddb
....\..\hdb3.cmp_merge.kpt
....\..\hdb3.db_info
....\..\hdb3.eco.cdb
....\..\hdb3.eda.qmsg
....\..\hdb3.eds_overflow
....\..\hdb3.fit.qmsg
....\..\hdb3.fnsim.hdb
....\..\hdb3.fnsim.qmsg
....\..\hdb3.hier_info
....\..\hdb3.hif
....\..\hdb3.lpc.html
....\..\hdb3.lpc.rdb
....\..\hdb3.lpc.txt
....\..\hdb3.map.bpm
....\..\hdb3.map.cdb
....\..\hdb3.map.ecobp
....\..\hdb3.map.hdb
....\..\hdb3.map.kpt
....\..\hdb3.map.logdb
....\..\hdb3.map.qmsg
....\..\hdb3.map_bb.cdb
....\..\hdb3.map_bb.hdb
....\..\hdb3.map_bb.logdb
....\..\hdb3.pre_map.cdb
....\..\hdb3.pre_map.hdb
....\..\hdb3.rtlv.hdb
....\..\hdb3.rtlv_sg.cdb
....\..\hdb3.rtlv_sg_swap.cdb
....\..\hdb3.sgdiff.cdb
....\..\hdb3.sgdiff.hdb
....\..\hdb3.sim.cvwf
....\..\hdb3.sim.hdb
....\..\hdb3.sim.qmsg
....\..\hdb3.sim.rdb
....\..\hdb3.simfam
....\..\hdb3.sim_ori.vwf
....\..\hdb3.sld_design_entry.sci
....\..\hdb3.sld_design_entry_dsc.sci
....\..\hdb3.smart_action.txt
....\..\hdb3.syn_hier_info
....\..\hdb3.tan.qmsg
....\..\hdb3.tis_db_list.ddb
....\..\logic_util_heursitic.dat
....\..\prev_cmp_hdb3.asm.qmsg
....\..\prev_cmp_hdb3.eda.qmsg
....\..\prev_cmp_hdb3.fit.qmsg
....\..\prev_cmp_hdb3.map.qmsg