文件名称:clock
介绍说明－－下载内容均来自于网络，请自行研究使用
用VHDL 语言设计数字钟，实现在数码管上显示分钟和秒，并且可以手动调节分钟，
实现分钟的增或者减。该设计包括以下几个部分：
（1）分频电路的设计，产生1Hz 的时钟信号，作为秒计时脉冲；
（2）手动调节电路，包括“时增”“时减”“分增”“分减”。
（3）时分秒计时电路。
（4）7 段数码管显示电路。
将 SW1 和SW2 初始状态均置为高电平。拨动开关SW1 到低，分钟进行加计数，秒停
止计数，当计数到59 时，从00 开始重新加计数，将SW1 拨动到高时，在当前状态进行计时。当拨动开关SW2 为低时，分钟进行减计数，秒停止计数，当减到0 时，从59 开始减计数，将SW2 拨动到高时，在当前状态进行计时。-VHDL language with the design of digital clock, in the digital display minutes and seconds, and can manually adjust the minutes,
To achieve the increase or decrease minutes. The design includes the following sections:
(1) frequency circuit design, resulting in 1Hz clock signal, as the second time pulse
(2) manual adjustment of the circuit, including when the increase when the minus points by sub-minus.
(3) when the minutes and seconds timer circuit.
(4) 7-segment LED display circuit.
Set the initial state of SW1 and SW2 to high level. Toggle switch SW1 to low, minute to count up, seconds to stop
Stop counting, when counting to 59, 00 to re-count the start, will SW1 toggle to high, in the current state of time. When the switch SW2 is low, the timer counts down in minutes and stops counting in seconds. When it decreases to 0, it counts down 59, and turns SW2 to HIGH to count in the current state.
实现分钟的增或者减。该设计包括以下几个部分：
（1）分频电路的设计，产生1Hz 的时钟信号，作为秒计时脉冲；
（2）手动调节电路，包括“时增”“时减”“分增”“分减”。
（3）时分秒计时电路。
（4）7 段数码管显示电路。
将 SW1 和SW2 初始状态均置为高电平。拨动开关SW1 到低，分钟进行加计数，秒停
止计数，当计数到59 时，从00 开始重新加计数，将SW1 拨动到高时，在当前状态进行计时。当拨动开关SW2 为低时，分钟进行减计数，秒停止计数，当减到0 时，从59 开始减计数，将SW2 拨动到高时，在当前状态进行计时。-VHDL language with the design of digital clock, in the digital display minutes and seconds, and can manually adjust the minutes,
To achieve the increase or decrease minutes. The design includes the following sections:
(1) frequency circuit design, resulting in 1Hz clock signal, as the second time pulse
(2) manual adjustment of the circuit, including when the increase when the minus points by sub-minus.
(3) when the minutes and seconds timer circuit.
(4) 7-segment LED display circuit.
Set the initial state of SW1 and SW2 to high level. Toggle switch SW1 to low, minute to count up, seconds to stop
Stop counting, when counting to 59, 00 to re-count the start, will SW1 toggle to high, in the current state of time. When the switch SW2 is low, the timer counts down in minutes and stops counting in seconds. When it decreases to 0, it counts down 59, and turns SW2 to HIGH to count in the current state.
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下载文件列表
数字钟设计\clock.bgn
..........\clock.bit
..........\clock.bld
..........\clock.cmd_log
..........\clock.drc
..........\clock.ise
..........\clock.lfp
..........\clock.lso
..........\clock.ncd
..........\clock.ngc
..........\clock.ngd
..........\clock.ngr
..........\clock.ntrc_log
..........\clock.pad
..........\clock.par
..........\clock.pcf
..........\clock.prj
..........\clock.ptwx
..........\clock.restore
..........\clock.stx
..........\clock.syr
..........\clock.twr
..........\clock.twx
..........\clock.ucf
..........\clock.unroutes
..........\clock.ut
..........\clock.vhd
..........\clock.xpi
..........\clock.xst
..........\clock_guide.ncd
..........\clock_map.map
..........\clock_map.mrp
..........\clock_map.ncd
..........\clock_map.ngm
..........\clock_map.xrpt
..........\clock_ngdbuild.xrpt
..........\clock_pad.csv
..........\clock_pad.txt
..........\clock_par.xrpt
..........\clock_prev_built.ngd
..........\clock_summary.html
..........\clock_summary.xml
..........\clock_usage.xml
..........\clock_vhdl.prj
..........\......xdb\cst.xbcd
..........\.........\tmp\ise\version
..........\.........\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
..........\.........\...\...\............\..................\.........\HDProject_StrTbl
..........\.........\...\...\............\..................\__stored_object_table__
..........\.........\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
..........\.........\...\...\............\.........\.......\RunOnce_tcl_StrTbl
..........\.........\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
..........\.........\...\...\............\................\................\dpm_project_main_StrTbl
..........\.........\...\...\............\................\__stored_objects__
..........\.........\...\...\............\................\__stored_objects___StrTbl
..........\.........\...\...\............\................\__stored_object_table__
..........\.........\...\...\............\................Gui\GuiProjectData
..........\.........\...\...\............\...................\GuiProjectData_StrTbl
..........\.........\...\...\............\xreport\Gc_RvReportViewer-Current-Module
..........\.........\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl
..........\.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-clock
..........\.........\...\...\............\.......\Gc_RvReportViewer-Module-Data-clock_StrTbl
..........\.........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default
..........\.........\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl
..........\.........\...\...\..REGISTRY__\Autonym\regkeys
..........\.........\...\...\............\bitgen\regkeys
..........\.........\...\...\............\common\regkeys
..........\.........\...\...\............\.pldfit\regkeys
..........\.........\...\...\............\Cs\regkeys
..........\.........\...\...\............\dumpngdio\regkeys
..........\.........\...\...\............\fuse\regkeys
..........\.........\...\...\............\HierarchicalDesign\HDProject\regkeys
..........\.........\...\...\............\..................\regkeys
..........\.........\...\...\............\hprep6\regkeys
..........\.........\...\...\............\idem\regkeys
..........\.........\...\...\............\map\regkeys
..........\.........\...\...\............\netgen\regkeys
..........\.........\...\...\............\.gc2edif\regkeys
..........\.........\...\...\............\...build\regkeys
..........\.........\...\...\............\..dbuild\regkeys
..........\.........\...\...\............\par\regkeys
..........\.........\...\...\............\ProjectNavigator\regkeys
..........\.........\...\...\............\................Gui\regkeys
..........\.........\...\...\............\.......SeedData\ProcessProperties\regkeys
..........\.........\...\...\............\...............\...jectProperties\regkeys
..........\.........\...\...\............\...............\regkeys
..........\.........\...\...\............\...............\UserLibrari