文件名称:IDCT
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HEVC是正在研发的新一代视频编码标准。 本文面向HDTV应用，设计兼容HEVC标准的两位整数IDCT电路， 通过对IDCT的特点进行分析，完成了电路的架构设计, 采用较为节省面积的做法和流水线结构，并进行VerilogHDL代码设计-High Efficiency Video Coding(HEVC) is the currently developing video standard. In this article, a novel pipelined 2-D IDCT architecture based on HEVC is presented. By the analysis of the architecture design and adopting the area-saved and pipelined one, the Verilog HDL code is designed as well as logical simulation and performance analysis.
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下载文件列表
input_buf.v
matrix.v
memory.v
row_trf.v
ser_par.v
top.v
col_trf.v