文件名称:VHDL-Gray-code
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基于vhdl格雷码设计代码，调试过没错误。-Gray code design based on VHDL code, debugging didn t mistake.
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下载文件列表
基于VHDL格雷码编码器的设计\exp2.asm.rpt
..........................\exp2.done
..........................\exp2.eda.rpt
..........................\exp2.fit.rpt
..........................\exp2.fit.smsg
..........................\exp2.fit.summary
..........................\exp2.flow.rpt
..........................\exp2.map.rpt
..........................\exp2.map.summary
..........................\exp2.pin
..........................\exp2.qpf
..........................\exp2.qsf
..........................\exp2.qws
..........................\exp2.sof
..........................\exp2.sta.rpt
..........................\exp2.sta.summary
..........................\exp2.vhd
..........................\incremental_db\compiled_partitions\exp2.root_partition.cmp.atm
..........................\..............\...................\exp2.root_partition.cmp.dfp
..........................\..............\...................\exp2.root_partition.cmp.hdbx
..........................\..............\...................\exp2.root_partition.cmp.kpt
..........................\..............\...................\exp2.root_partition.cmp.rcf
..........................\..............\...................\exp2.root_partition.map.atm
..........................\..............\...................\exp2.root_partition.map.dpi
..........................\..............\...................\exp2.root_partition.map.hdbx
..........................\..............\...................\exp2.root_partition.map.kpt
..........................\..............\README
..........................\simulation\modelsim\exp2.sft
..........................\..........\........\exp2.vho
..........................\..........\........\exp2_8_1200mv_0c_vhd_slow.sdo
..........................\..........\........\exp2_8_1200mv_85c_vhd_slow.sdo
..........................\..........\........\exp2_min_1200mv_0c_vhd_fast.sdo
..........................\..........\........\exp2_modelsim.xrf
..........................\..........\........\exp2_vhd.sdo
..........................\timing\primetime\exp2.collections.sdc
..........................\......\.........\exp2.constraints.sdc
..........................\......\.........\exp2.pt.tcl
..........................\......\.........\exp2.vo
..........................\......\.........\exp2_8_1200mv_0c_v_slow.sdo
..........................\......\.........\exp2_8_1200mv_85c_v_slow.sdo
..........................\......\.........\exp2_min_1200mv_0c_v_fast.sdo
..........................\......\.........\exp2_v.sdo
..........................\incremental_db\compiled_partitions
..........................\simulation\modelsim
..........................\timing\primetime
..........................\db
..........................\incremental_db
..........................\simulation
..........................\timing
基于VHDL格雷码编码器的设计