文件名称:ADC_AD7490
介绍说明－－下载内容均来自于网络，请自行研究使用
THIS PROJECT IMPLEMENTED ON VITERX 4 FPGA and THE COMPLETE SOURCE FILES testbench, design file UCF file are there and THIS ADC is maily configured with SPI protocol interface SPI CLK,SPI DATA, SPI LE, the SPEED OF OPERATION OF SPI CLK is 10 MHZ
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ADC_AD7490\AD7490.pdf
..........\ADC_CONTROLLER.vhd
..........\TEST_ADC_CONTROLLER_tb.vhd
..........\top_adc_module.drc
..........\TOP_ADC_MODULE.ucf
..........\TOP_ADC_MODULE.vhd
ADC_AD7490