文件名称:pll
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一个基于FPGA的载波同步环的设计，开发语言Verilog，开发工具ISE 14.7，可用于FM接收机中，典型SDR项目-An FPGA-based carrier synchronization loop design, development language Verilog, development tools ISE 14.7, FM receivers can be used, typically SDR project
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下载文件列表
pll\AD.v
...\DA.v
...\IIR.v
...\ipcore_dir\.lso
...\..........\coregen.cgp
...\..........\coregen.log
...\..........\create_DCM1.tcl
...\..........\create_dds.tcl
...\..........\create_fir1.tcl
...\..........\create_nco.tcl
...\..........\DCM1\clk_wiz_v3_6_readme.txt
...\..........\....\doc\clk_wiz_v3_6_readme.txt
...\..........\....\...\clk_wiz_v3_6_vinfo.html
...\..........\....\...\pg065_clk_wiz.pdf
...\..........\....\example_design\DCM1_exdes.ucf
...\..........\....\..............\DCM1_exdes.v
...\..........\....\..............\DCM1_exdes.xdc
...\..........\....\implement\implement.bat
...\..........\....\.........\implement.sh
...\..........\....\.........\planAhead_ise.bat
...\..........\....\.........\planAhead_ise.sh
...\..........\....\.........\planAhead_ise.tcl
...\..........\....\.........\planAhead_rdn.bat
...\..........\....\.........\planAhead_rdn.sh
...\..........\....\.........\planAhead_rdn.tcl
...\..........\....\.........\xst.prj
...\..........\....\.........\xst.scr
...\..........\....\simulation\DCM1_tb.v
...\..........\....\..........\functional\simcmds.tcl
...\..........\....\..........\..........\simulate_isim.bat
...\..........\....\..........\..........\simulate_isim.sh
...\..........\....\..........\..........\simulate_mti.bat
...\..........\....\..........\..........\simulate_mti.do
...\..........\....\..........\..........\simulate_mti.sh
...\..........\....\..........\..........\simulate_ncsim.sh
...\..........\....\..........\..........\simulate_vcs.sh
...\..........\....\..........\..........\ucli_commands.key
...\..........\....\..........\..........\vcs_session.tcl
...\..........\....\..........\..........\wave.do
...\..........\....\..........\..........\wave.sv
...\..........\....\..........\timing\DCM1_tb.v
...\..........\....\..........\......\sdf_cmd_file
...\..........\....\..........\......\simcmds.tcl
...\..........\....\..........\......\simulate_isim.sh
...\..........\....\..........\......\simulate_mti.bat
...\..........\....\..........\......\simulate_mti.do
...\..........\....\..........\......\simulate_mti.sh
...\..........\....\..........\......\simulate_ncsim.sh
...\..........\....\..........\......\simulate_vcs.sh
...\..........\....\..........\......\ucli_commands.key
...\..........\....\..........\......\vcs_session.tcl
...\..........\....\..........\......\wave.do
...\..........\DCM1.asy
...\..........\DCM1.gise
...\..........\DCM1.ncf
...\..........\DCM1.sym
...\..........\DCM1.ucf
...\..........\DCM1.v
...\..........\DCM1.veo
...\..........\DCM1.xco
...\..........\DCM1.xdc
...\..........\DCM1.xise
...\..........\DCM1_flist.txt
...\..........\DCM1_xmdf.tcl
...\..........\edit_DCM1.tcl
...\..........\edit_fir1.tcl
...\..........\edit_nco.tcl
...\..........\fir1.asy
...\..........\fir1.gise
...\..........\fir1.mif
...\..........\fir1.ncf
...\..........\fir1.ngc
...\..........\fir1.sym
...\..........\fir1.v
...\..........\fir1.veo
...\..........\fir1.xco
...\..........\fir1.xise
...\..........\fir1COEFF_auto0_0.mif
...\..........\fir1COEFF_auto0_1.mif
...\..........\fir1COEFF_auto0_2.mif
...\..........\fir1COEFF_auto0_3.mif
...\..........\fir1COEFF_auto0_4.mif
...\..........\fir1filt_decode_rom.mif
...\..........\fir1_flist.txt
...\..........\fir1_readme.txt
...\..........\fir1_xmdf.tcl
...\..........\nco\doc\dds_compiler_v4_0_vinfo.html
...\..........\...\...\dds_ds558.pdf
...\..........\nco.asy
...\..........\nco.gise
...\..........\nco.ncf
...\..........\nco.ngc
...\..........\nco.sym
...\..........\nco.v
...\..........\nco.veo
...\..........\nco.xco
...\..........\nco.xise
...\..........\nco_flist.txt
...\..........\nco_readme.txt
...\..........\nco_xmdf.tcl