文件名称:StopWatch

  • 所属分类:
  • 其他小程序
  • 资源属性:
  • [ASM] [源码]
  • 上传时间:
  • 2015-07-12
  • 文件大小:
  • 10mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 崔*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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verilog实现数字式秒表,秒表有一个按键开关:当电路处于“初始”状态时,第一次按键,计时开始(“计时”状态);再

次按键。计时停止(“停止”状态);第三次按键,计时器复位为 0’0’.0’’,且电路恢复到“初始”状态。详见压缩文件包内pdf说明。-Verilog in implementing digital stopwatch, stopwatches have a key switch: when the circuit is in the initial State, first press the set start time ( time )



Time button. Timer stop ( stop ) the third button, the timer is reset to 0 0 .0  and restore circuits to initial State. See note compressed packages PDF.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





3120103843_stopwatch\ise\.lso

....................\...\bcd60counter_summary.html

....................\...\button_press_unit_tb.udo

....................\...\compxlib.cfg

....................\...\compxlib.log

....................\...\control_2_tb_v.udo

....................\...\div_tb.udo

....................\...\ise.ipf

....................\...\model.list

....................\...\show_t_summary.html

....................\...\stopwatch.bgn

....................\...\stopwatch.bit

....................\...\stopwatch.bld

....................\...\stopwatch.cmd_log

....................\...\stopwatch.drc

....................\...\stopwatch.ise

....................\...\stopwatch.ise_ISE_Backup

....................\...\stopwatch.lfp

....................\...\stopwatch.lso

....................\...\stopwatch.ncd

....................\...\stopwatch.ngc

....................\...\stopwatch.ngd

....................\...\stopwatch.ngr

....................\...\stopwatch.ntrc_log

....................\...\stopwatch.pad

....................\...\stopwatch.par

....................\...\stopwatch.pcf

....................\...\stopwatch.prj

....................\...\stopwatch.restore

....................\...\stopwatch.stx

....................\...\stopwatch.syr

....................\...\stopwatch.twr

....................\...\stopwatch.twx

....................\...\stopwatch.unroutes

....................\...\stopwatch.ut

....................\...\stopwatch.xpi

....................\...\stopwatch.xst

....................\...\stopwatch_dcm.tfi

....................\...\stopwatch_dcm.v

....................\...\stopwatch_dcm.xaw

....................\...\stopwatch_dcm_arwz.ucf

....................\...\stopwatch_dcm_summary.html

....................\...\stopwatch_guide.ncd

....................\...\stopwatch_map.map

....................\...\stopwatch_map.mrp

....................\...\stopwatch_map.ncd

....................\...\stopwatch_map.ngm

....................\...\stopwatch_pad.csv

....................\...\stopwatch_pad.txt

....................\...\stopwatch_prev_built.ngd

....................\...\stopwatch_summary.html

....................\...\stopwatch_summary.xml

....................\...\stopwatch_tb_v.fdo

....................\...\stopwatch_tb_v.udo

....................\...\stopwatch_usage.xml

....................\...\time_counter_summary.html

....................\...\transcript

....................\...\vsim.wlf

....................\...\work\bcdcounter60\verilog.asm

....................\...\....\............\_primary.dat

....................\...\....\............\_primary.vhd

....................\...\....\.utton_press_unit\verilog.asm

....................\...\....\.................\_primary.dat

....................\...\....\.................\_primary.vhd

....................\...\....\................._tb\verilog.asm

....................\...\....\....................\_primary.dat

....................\...\....\....................\_primary.vhd

....................\...\....\controller_key\verilog.asm

....................\...\....\..............\_primary.dat

....................\...\....\..............\_primary.vhd

....................\...\....\......._2\transcript

....................\...\....\.........\verilog.asm

....................\...\....\.........\_primary.dat

....................\...\....\.........\_primary.vhd

....................\...\....\........._tb_v\verilog.asm

....................\...\....\..............\_primary.dat

....................\...\....\..............\_primary.vhd

....................\...\....\..unter_@n\verilog.asm

....................\...\....\..........\_primary.dat

....................\...\....\..........\_primary.vhd

....................\...\....\dff\verilog.asm

....................\...\....\...\_primary.dat

....................\...\....\...\_primary.vhd

....................\...\....\.isplay\verilog.asm

....................\...\....\.......\_primary.dat

....................\...\....\.......\_primary.vhd

....................\...\....\......._encoder\verilog.asm

....................\...\....\...............\_primary.dat

................

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