文件名称:divide-freq
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基于XILINX芯片的verilog程序。调用DCM模块，完成50MHz转换75MHz，相位偏移90°-XILINX chip based on Verilog program. Call the DCM module to complete the 50MHz conversion, 75MHz, phase shift of 90 degrees
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下载文件列表
divide freq\exp6_6.gise
...........\exp6_6.xise
...........\exp6_6_ise12migration.zip
...........\fuse.log
...........\fuse.xmsgs
...........\fuseRelaunch.cmd
...........\ipcore_dir\coregen.cgp
...........\..........\coregen.log
...........\..........\create_pll.tcl
...........\..........\create_s6_clock.tcl
...........\..........\edit_s6_clock.tcl
...........\..........\pll\clk_wiz_v3_6_readme.txt
...........\..........\...\doc\clk_wiz_v3_6_readme.txt
...........\..........\...\...\clk_wiz_v3_6_vinfo.html
...........\..........\...\...\pg065_clk_wiz.pdf
...........\..........\...\example_design\pll_exdes.ucf
...........\..........\...\..............\pll_exdes.v
...........\..........\...\..............\pll_exdes.xdc
...........\..........\...\implement\implement.bat
...........\..........\...\.........\implement.sh
...........\..........\...\.........\planAhead_ise.bat
...........\..........\...\.........\planAhead_ise.sh
...........\..........\...\.........\planAhead_ise.tcl
...........\..........\...\.........\planAhead_rdn.bat
...........\..........\...\.........\planAhead_rdn.sh
...........\..........\...\.........\planAhead_rdn.tcl
...........\..........\...\.........\xst.prj
...........\..........\...\.........\xst.scr
...........\..........\...\simulation\functional\simcmds.tcl
...........\..........\...\..........\..........\simulate_isim.bat
...........\..........\...\..........\..........\simulate_isim.sh
...........\..........\...\..........\..........\simulate_mti.bat
...........\..........\...\..........\..........\simulate_mti.do
...........\..........\...\..........\..........\simulate_mti.sh
...........\..........\...\..........\..........\simulate_ncsim.sh
...........\..........\...\..........\..........\simulate_vcs.sh
...........\..........\...\..........\..........\ucli_commands.key
...........\..........\...\..........\..........\vcs_session.tcl
...........\..........\...\..........\..........\wave.do
...........\..........\...\..........\..........\wave.sv
...........\..........\...\..........\pll_tb.v
...........\..........\...\..........\timing\pll_tb.v
...........\..........\...\..........\......\sdf_cmd_file
...........\..........\...\..........\......\simcmds.tcl
...........\..........\...\..........\......\simulate_isim.sh
...........\..........\...\..........\......\simulate_mti.bat
...........\..........\...\..........\......\simulate_mti.do
...........\..........\...\..........\......\simulate_mti.sh
...........\..........\...\..........\......\simulate_ncsim.sh
...........\..........\...\..........\......\simulate_vcs.sh
...........\..........\...\..........\......\ucli_commands.key
...........\..........\...\..........\......\vcs_session.tcl
...........\..........\...\..........\......\wave.do
...........\..........\pll.asy
...........\..........\pll.gise
...........\..........\pll.sym
...........\..........\pll.ucf
...........\..........\pll.v
...........\..........\pll.veo
...........\..........\pll.xco
...........\..........\pll.xdc
...........\..........\pll.xise
...........\..........\pll_flist.txt
...........\..........\pll_xmdf.tcl
...........\..........\s6_clock\clk_wiz_v3_2_readme.txt
...........\..........\........\clk_wiz_v3_6_readme.txt
...........\..........\........\doc\clk_wiz_ds709.pdf
...........\..........\........\...\clk_wiz_gsg521.pdf
...........\..........\........\...\clk_wiz_v3_2_readme.txt
...........\..........\........\...\clk_wiz_v3_2_vinfo.html
...........\..........\........\...\clk_wiz_v3_6_readme.txt
...........\..........\........\...\clk_wiz_v3_6_vinfo.html
...........\..........\........\...\pg065_clk_wiz.pdf
...........\..........\........\example_design\s6_clock_exdes.ucf
...........\..........\........\..............\s6_clock_exdes.v
...........\..........\........\..............\s6_clock_exdes.xdc
...........\..........\........\generate\clk_wiz_v3_2_generate.tcl
...........\..........\........\........\clk_wiz_v3_2_model.tcl
...........\..........\........\........\run_legacy_tcl_flow.tcl
...........\..........\........\implement\implement.bat