文件名称:ledverilog
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FPGA简单应用，VHDL程序，LED驱动程序，供学习参考。-FPGA and simple application, VHDL program, LED driver, provide the reference for the study.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ledverilog\db\johnson.asm.qmsg
..........\..\johnson.cbx.xml
..........\..\johnson.cmp.cdb
..........\..\johnson.cmp.hdb
..........\..\johnson.cmp.kpt
..........\..\johnson.cmp.logdb
..........\..\johnson.cmp.rdb
..........\..\johnson.cmp.tdb
..........\..\johnson.cmp0.ddb
..........\..\johnson.db_info
..........\..\johnson.eco.cdb
..........\..\johnson.fit.qmsg
..........\..\johnson.hier_info
..........\..\johnson.hif
..........\..\johnson.lpc.html
..........\..\johnson.lpc.rdb
..........\..\johnson.lpc.txt
..........\..\johnson.map.cdb
..........\..\johnson.map.hdb
..........\..\johnson.map.logdb
..........\..\johnson.map.qmsg
..........\..\johnson.pre_map.cdb
..........\..\johnson.pre_map.hdb
..........\..\johnson.rtlv.hdb
..........\..\johnson.rtlv_sg.cdb
..........\..\johnson.rtlv_sg_swap.cdb
..........\..\johnson.sgdiff.cdb
..........\..\johnson.sgdiff.hdb
..........\..\johnson.sld_design_entry.sci
..........\..\johnson.sld_design_entry_dsc.sci
..........\..\johnson.syn_hier_info
..........\..\johnson.tan.qmsg
..........\..\johnson.tis_db_list.ddb
..........\..\johnson_global_asgn_op.abo
..........\..\prev_cmp_johnson.asm.qmsg
..........\..\prev_cmp_johnson.fit.qmsg
..........\..\prev_cmp_johnson.map.qmsg
..........\..\prev_cmp_johnson.qmsg
..........\..\prev_cmp_johnson.tan.qmsg
..........\incremental_db\compiled_partitions\johnson.root_partition.map.kpt
..........\..............\README
..........\johnson.asm.rpt
..........\johnson.cdf
..........\johnson.done
..........\johnson.dpf
..........\johnson.fit.rpt
..........\johnson.fit.smsg
..........\johnson.fit.summary
..........\johnson.flow.rpt
..........\johnson.map.rpt
..........\johnson.map.summary
..........\johnson.pin
..........\johnson.pof
..........\johnson.qpf
..........\johnson.qsf
..........\johnson.qws
..........\johnson.sof
..........\johnson.tan.rpt
..........\johnson.tan.summary
..........\johnson.v
..........\johnson.v.bak
..........\johnson_assignment_defaults.qdf
..........\incremental_db\compiled_partitions
..........\db
..........\incremental_db
ledverilog