对于串行FLASH芯片的存取操作，内核能够通过直接对芯片的读写来实现，但是较慢的芯片响应速度会使用读写响应时间加长，吞吐率降低。因此，内核通过保持一个称为数据缓冲区高速缓冲的内部数据缓冲区来减小对芯片的存取频度。高速缓冲含有最近被使用过的串行Flash的数据。

当从芯片中读数据的时候，内核试图先从高速缓冲中读取。如果数据已经在该高速缓冲中，则内核可以不必从芯片中读取数据。如果数据不在该高速缓冲中，则内核从芯片上读数据，并将其缓冲起来，这样下次使用时就不需要再从芯片中读取了。

但是，由于串行Flash的容量都比较大，将Flash的所有内容都缓冲在内存中是不可行的，只能将部分Flash的内容缓冲起来。所使用的算法试图把尽可能多的有效数据保存在高速缓冲中。-FLASH chip for serial access operation, the kernel can write directly on the chip to achieve, but the slower the response speed will use the chip to read and write response time longer, throughput decreases. Thus, by maintaining the internal kernel data buffer called the cache data buffer to reduce the chip access frequency. Cache containing recently been used serial Flash data.

When reading data　the chip when trying to start the kernel cache read. If the data is already in the cache, then the kernel does not have to read the data　the chip. If the data is not in the cache, then the kernel data read　the chip, and buffer up, so the next time you use do not need to read　the chip.

However, due to the relatively large capacity Serial Flash, Flash content will all have a buffer is not feasible, can only be part of the contents of the buffer up in Flash memory. The algorithm used to attempt as much valid data stored in the cache in.